• Journal of Institute of Control, Robotics and Systems
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• v.17 no.9
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• pp.863-868
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• 2011

This paper presents a method to achieve a synchronous positioning objective for a dual-cylinder electro-hydraulic system with friction characteristics. The control system consists of a VSC (Variable Structure Controller) for each of the hydraulic cylinders and a PID (Proportional-Integral-Derivative) feedback controller. The PID controller is used for controlling the non-synchronous error generated by both cylinders when motion synchronization is carried out. To enhance the position-tracking performance of the individual cylinders friction characteristics is modeled in model, based on the estimated friction force. The simulation and experimental results show that the proposed method can effectively achieve the objective of position synchronization in the dualcylinder electro-hydraulic system, with maximum synchronization error with ${\pm}2\;mm$.

• Journal of Electrical Engineering and information Science
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• v.2 no.3
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• pp.41-50
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• 1997

In this paper, we describe the design, implementation and evaluation for a multimedia conferencing system with intramedia and intermedia synchronization support between audio and video. The synchronization mechanism proposed here is capable of dynamically adapting to various network conditions thus providing an optimized QoS. In realizing the system based on this mechanism, NeVoT on Mbone is used for audio and VIC for video. Furthermore a synchromization controller is designed and realized with a unique process in supporting intermedia synchronization. Each media agents handling its media stream are modified with intramedia synchronization function. And a communicative function between media agents and synchronization controller is added as well for intermedia synchronization function. Each media agents function reports its buffering status to the synchronization control process which in turn send out optimized buffering delay value thus supporting intermedia synchronization. The realized system is configured and tested on Ethernet and ATM network where performance measurements were performed and its effective synchronization support has been assured.

• 제어로봇시스템학회:학술대회논문집
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• 1991.10b
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• pp.1817-1822
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• 1991

A method of reducing overhead caused by the processor synchronization process and common memory accesses in finely grained tasks is described. We propose a scheduler which considers the preparation time during searching to minimize the redundant accesses to shared memory. Since the suggested hardware (synchronizer) determines the access order of processors and bus arbitration simultaneously by including the synchronization process into the bus arbitration process, the synchronization time vanishes. Therefore this synchronizer has no overhead caused by the processor synchronization[l]. The proposed scheduler algorithm is processed in parallel. The processes share the upper bound derived by each searching and the lower bound function is built considering the preparation time in order to eliminate as many searches as possible. An application of the proposed method to a multi-DSP system to calculate inverse dynamics for robot arms, showed that the sampling time can be twice shorter than that of the conventional one.

• International Journal of Fuzzy Logic and Intelligent Systems
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• v.11 no.3
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• pp.143-148
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• 2011

In this paper, a backstepping design is proposed to achieve stabilization and synchronization for the Lorenz-Stenflo (LS) chaotic system. The proposed method is a recursive Lyapunov-based scheme and provides a systematic procedure to design stabilizing controllers. The proposed controller enables stabilization of the chaotic motion and synchronization of two identical LS chaotic systems using only a single control input. Numerical simulations are presented to validate the proposed method.

• ETRI Journal
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• v.30 no.3
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• pp.441-450
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• 2008

The scalable extension of H.264, known as scalable video coding (SVC) has been the main focus of the Joint Video Team's work and was finalized at the end of 2007. Synchronization between media is an important aspect in the design of a scalable video streaming system. This paper proposes an efficient media synchronization mechanism for SVC video transport over IP networks. To support synchronization between video and audio bitstreams transported over IP networks, a real-time transport protocol/RTP control protocol (RTP/RTCP) suite is usually employed. To provide an efficient mechanism for media synchronization between SVC video and audio, we suggest an efficient RTP packetization mode for inter-layer synchronization within SVC video and propose a computationally efficient RTCP packet processing method for inter-media synchronization. By adopting the computationally simple RTCP packet processing, we do not need to process every RTCP sender report packet for inter-media synchronization. We demonstrate the effectiveness of the proposed mechanism by comparing its performance with that of the conventional method.

• Journal of Drive and Control
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• v.10 no.3
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• pp.14-20
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• 2013

In the study, a control strategy using a feedback linearization compensator and a disturbance observer was suggested and applied to the synchronization control of two hydraulic cylinders. The hydraulic system consists of a proportional directional control valve with overlap characteristic near the neutral position, a conventional hydraulic cylinder and an external load. The control performances of the system were verified through numerical simulations. From the simulations, it was ascertained that excellent control performances were obtained with the suggested control strategy.

• Journal of Satellite, Information and Communications
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• v.4 no.1
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• pp.14-20
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• 2009

This paper describes synchronization concept and algorithm of the reverse DS-SS/TDMA control channel to handle satellite terminals which are distributed through the mission area. Military satellite control channel should have ECCM capabilities and handle more than several hundreds satcom terminals simultaneously. DS-SS/TDMA control channel can satisfy these demand but it spend much synchronization time. Proposed algorithm insert the preamble which is divided with several short sub bins prior to control data and use the parallel matched filtering searcher for each sub bin. As a result of the test, proposed algorithm can acquire most of control channel packet successfully within several milliseconds in severe jamming environment.

• Journal of Institute of Control, Robotics and Systems
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• v.15 no.11
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• pp.1144-1149
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• 2009

This paper deals with the time synchronization problem over SpaceWire links. SpaceWire is a standard for high-speed links and networks between spacecraft components, which was invented for better, cheaper, faster on-board data handling in spacecraft. The standard defines Time-Code for time distribution over SpaceWire network. When a Time-Code is transmitted, transmission delay and jitter is unavoidable. In this paper, a mechanism to remove Time-Code transmission delay and jitter over SpaceWire links is proposed and implemented with FPGA for validation. The proposed mechanism achieves high resolution clock synchronization over SpaceWire links, complies with the standard and can be easily adopted over SpaceWire network.

• IEMEK Journal of Embedded Systems and Applications
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• v.14 no.6
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• pp.339-346
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• 2019

Multi-axis servo systems are widely used in various fields such as industiral systems for improving production efficiency, robotics and complex systems where many mechanical devices and sensor systems are connected. Such a servo system requires that the servo control technique to realize the synchronization of the drive shaft in the steady state and transient conditions and to control so as to follow the target track in order to improve product precision and production efficiency. In addition, embedded type hardware is required for smooth control of the entire multi-axis system. Therefore, this paper uses hardware based on FPGA which is widely used in digital signal processing field and various control system because hardware design change is easy and parallel processing is possible. In addition, Labview based servo motor control program was studied that can control the servo motor by ensuring the performance and flexibility of the FPGA and follow the target trajectory according to various speed processing and accurate timing synchronization.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2013.05a
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• pp.823-824
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• 2013