• Title/Summary/Keyword: Switching ripple current

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Analysis, Design and Implementation of an Interleaved DC/DC Converter with Series-Connected Transformers

  • Lin, Bor-Ren;Chen, Chih-Chieh
    • Journal of Power Electronics
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    • v.12 no.4
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    • pp.643-653
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    • 2012
  • An interleaved DC/DC converter with series-connected transformers is presented to implement the features of zero voltage switching (ZVS), load current sharing and ripple current reduction. The proposed converter includes two half-bridge converter cells connected in series to reduce the voltage stress of the switches at one-half of the input voltage. The output sides of the two converter cells with interleaved pulse-width modulation are connected in parallel to reduce the ripple current at the output capacitor and to achieve load current sharing. Therefore, the size of the output chokes and the capacitor can be reduced. The output capacitances of the MOSFETs and the resonant inductances are resonant at the transition instant to achieve ZVS turn-on. In addition, the switching losses on the power switches are reduced. Finally, experiments on a laboratory prototype (24V/40A) are provided to demonstrate the performance of the proposed converter.

Filter Design for Utility Interactive Inverters using Single-Phase Half-Bridge Topology (단상하프브릿지 구조를 갖는 계통연계형 인버터의 필터인덕터 설계)

  • Kim, Hyo-Sung
    • The Transactions of the Korean Institute of Power Electronics
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    • v.12 no.5
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    • pp.364-371
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    • 2007
  • This paper deals with filter design for utility-interactive voltage-sourced PWM inverters built by single-phase half-bridge topology. By analyzing the relation between utility voltage and the ac output voltage of single-phase half-bridge inverters, the instantaneous voltage applied on the filter inductor is deduced qualitatively and quantitatively. Moreover, switching ripple current through the filter inductor is calculated from the filter inductor voltage. Based on the above mentioned analysis, filter design method is proposed by evaluating the percentage of the switching ripple current against the rated fundamental current. Proposed filter design method is verified by simulation and experiment.

Filter Design for Utility Interactive Inverters using Single-phase Full-bridge Topology (단상풀브릿지 구조를 갖는 계통연계형 인버터의 필터인덕터 설계)

  • Kim, Hyo-Sung
    • The Transactions of the Korean Institute of Power Electronics
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    • v.12 no.4
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    • pp.346-353
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    • 2007
  • This paper deals with filter design for utility-interactive voltage-sourced PWM inverters built by single-phase full-bridge topology By analyzing the relation between utility voltage and the ac output voltage of single-phase half-bridge inverters, the instantaneous voltage applied on the filter inductor is deduced qualitatively and quantitatively. Moreover, switching ripple current through the filter inductor is calculated from the filter inductor voltage. Based on the above mentioned analysis, filter design method is proposed by evaluating the percentage of the switching ripple current against the rated fundamental current. Proposed filter design method is verified by simulation and experiment.

Comparative Study of Minimum Ripple Switching Loss PWM Hybrid Sequences for Two-level VSI Drives

  • Vivek, G.;Biswas, Jayanta;Nair, Meenu D.;Barai, Mukti
    • Journal of Power Electronics
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    • v.18 no.6
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    • pp.1729-1750
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    • 2018
  • Voltage source inverters (VSIs) are widely used to drive induction motors in industry applications. The quality of output waveforms depends on the switching sequences used in pulse width modulation (PWM). In this work, all existing optimal space vector pulse width modulation (SVPWM) switching strategies are studied. The performance of existing SVPWM switching strategies is optimized to realize a tradeoff between quality of output waveforms and switching losses. This study generalizes the existing optimal switching sequences for total harmonic distortions (THDs) and switching losses for different modulation indexes and reference angles with a parameter called quality factor. This factor provides a common platform in which the THDs and switching losses of different SVPWM techniques can be compared. The optimal spatial distribution of each sequence is derived on the basis of the quality factor to minimize harmonic current distortions and switching losses in a sector; the result is the minimum ripple loss SVPWM (MRSLPWM). By employing the sequences from optimized switching maps, the proposed method can simultaneously reduce THDs and switching losses. Two hybrid SVPWM techniques are proposed to reduce line current distortions and switching losses in motor drives. The proposed hybrid SVPWM strategies are MRSLPWM 30 and MRSLPWM 90. With a low-cost PIC microcontroller (PIC18F452), the proposed hybrid SVPWM techniques and the quality of output waveforms are experimentally validated on a 2 kVA VSI based on a three-phase two-level insulated gate bipolar transistor.

Input Current Ripple Improvement on Interleaved Boost Power Factor Corrector Operating in Discontinuous Current Mode (불연속 전류모드로 동작하는 Interleaved 승압형 역률보상 컨버터의 입력전류 리플개선)

  • 허태원;박지호;노태균;김동완;박한석;우정인
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.17 no.1
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    • pp.116-123
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    • 2003
  • In this paper, interleaved boost converter is applied as a pre-regulator in switched mode power supply. The pre-regulator plays a role to improve power factor. Interleaved Boost Power Factor Corrector(IBPFC) can reduce input current ripple as a single voltage control loop only without inner current loop, because input current is divided each 50% by two switching devices. Each converter cell is also operated in discontinuous current mode and inductor current of each converter is discontinuous. Total input current which is composed by each converter cell is continuous current. Thus, IBPFC is able to improve input current ripple. IBPFC operating in discontinuous current mode can be classified as six modes from switching state and be carried out state space averaging small signal modeling. A control transfer function is obtained according to the modeling. Single voltage control loop is also constructed by the control transfer function. From experimental result, improvement of power factor and input current ripple are verified.

A Minimization Study of Consuming Current and Torque Ripple of Low Voltage BLDC Motor (저전압용 BLDC 전동기의 소비전류 및 토크리플 최소화 연구)

  • Kim, Han-Deul;Shin, Pan Seok
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.66 no.12
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    • pp.1721-1724
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    • 2017
  • This paper presents a numerical optimization technique to reduce input current and torque ripple of the low voltage BLDC motor using core, coil and switching angle optimization. The optimization technique is employed using the generalized response surface method(RSM) and sampling minimization technique with FEM. A 50W 24V BLDC motor is used to verify the proposed algorithm. As optimizing results, the input current is reduced from 2.46 to 2.11[A], and the input power is reduced from 59 [W] to 51 [W] at the speed of 1000 [rpm]. Also, applied the same optimization algorithm, the torque ripple is reduced about 7.4 %. It is confirmed that the proposed technique is a reasonably useful tool to reduce the consuming current and torque ripple of the low voltage BLDC motor for a compact and efficient design.

Zero-Current Switching Two-Transformer Phase-Shifted Full-Bridge Converter using Voltage Ripple (전압 리플을 이용해 영전류 스위칭하는 두 개의 트랜스포머를 가지는 위상천이 풀-브릿지 컨버터)

  • Han, Sang-Kyoo;Moon, Gun-Woo;Youn, Myung-Joong;Yoon, Hyun-Ki
    • The Transactions of the Korean Institute of Power Electronics
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    • v.11 no.1
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    • pp.14-21
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    • 2006
  • This paper presents a Zero-Current Switching(ZCS) two-transformer phase-shifted full-bridge(TTFB) converter using voltage ripple. The proposed converter provides Zero-Voltage Switching(ZVS) of leading leg switches and ZCS of lagging leg switches using voltage ripple. Especially, circulating current is reduced by ZCS operation and there are no additional components required for the soft switching of power switches. Furthermore, in case of light load, ZVS operation of lagging leg can be achieved. The operations, analysis and design consideration of proposed converter are presented. To verify the validity of the proposed converter, experimental results for a 410W (205[V], 2[A]) prototype are presented.

Analysis and Design of Interleaved Boost Power Factor Corrector on Two Stage AC/DC PFC Converter (2단 역률보상회로를 구성하는 Interleaved 승압형 컨버터의 해석 및 설계)

  • 허태원;손영대;김동완;김춘삼;박한석;우정인
    • The Transactions of the Korean Institute of Electrical Engineers B
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    • v.52 no.7
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    • pp.343-351
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    • 2003
  • In this paper, interleaved boost converter is applied as a first-stage converter in switch mode power supply. The first-stage converter plays a role to improve power factor. Interleaved Boost Power Factor Corrector(IBPFC) can reduce input current ripple as a single voltage control loop only without inner current loop, because input current is divided each 50% by two switching devices. Each converter cell is also operated in discontinuous current mode and inductor current of each converter is discontinuous. Total input current which is composed by each converter cell is continuous current. Thus, IBPFC is able to improve input current ripple. IBPFC operating in discontinuous current mode can be classified as six modes from switching state and be carried out state space averaging small signal modeling. A control transfer function is obtained according to the modeling. Not only steady-state characteristics but also dynamic characteristics is considered. Single voltage control loop is also constructed by the control transfer function. From experimental result, improvement of power factor and input current ripple are verified.

Reduction of Minimum Switching Duration in the Measurement of Three Phase Current with DC-Link Current Sensor (DC링크 전류센서를 이용한 삼상전류 측정 방식에서 최소 스위칭 시간의 단축)

  • 김경서
    • The Transactions of the Korean Institute of Electrical Engineers B
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    • v.52 no.12
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    • pp.649-654
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    • 2003
  • The simplest method for measuring output currents of the three phase inverters is to measure them with three current sensors such as hall sensors. This method requires at least two current sensors, and these types of sensors are somewhat expensive. More economical method is measuring DC link current with a simple shunt resistor, then, reconstructing output current using the DC link current value and the switching status. However, in low speed region, the measurement becomes difficult and even impossible due to the requirement of minimum switching duration for A/D conversion. These problems can be overcome by limitation of switching duration. Limitation of switching, however, causes voltage and current distortion. Owing to compensation, distortion can be effectively suppressed. However these increase acoustic noise due to increment of current ripple. In this paper, a current measurement method is proposed, which can reduce minimum switching duration resulting in reduction of acoustic noise. The validity of proposed method is confirmed through experiment.

New Control Method for the Current Ripple Reduction of 3-phase Interleaved Bidirectional DC-DC Converter (3상 인터리브드 양방향 DC-DC 컨버터의 전류리플을 저감하기 위한 새로운 제어기법)

  • Jung, Jae-Hun;Kim, Jihyun;Nho, Eui-Cheol;Kim, Heung-Geun;Chun, Tae-Won
    • The Transactions of the Korean Institute of Power Electronics
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    • v.21 no.3
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    • pp.260-266
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    • 2016
  • A new method for the current ripple reduction of a three-phase interleaved bidirectional DC-DC converter is proposed. The converter used in this study operates in discontinuous mode to minimize the switching losses. All the switches are turned on at ZVS and ZCS conditions, and turned off at ZVS condition. The charging and discharging power of the battery is controlled by varying the switching frequency while maintaining the discontinuous mode operation. A 3 kW 20 kHz power converter is designed and implemented. Simulation and experimental results show the validity of the proposed method. The proposed control method can be used to reduce the battery ripple current significantly.