• 한국기계가공학회지
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• 제12권4호
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• pp.16-21
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• 2013

This paper presents a DC link voltage control method to reduce the ripple current and the switching loss in the sinusoidal current drive system for the wide-speed range PMSM. The DC link voltage of the three phase inverter in the sinusoidal current drive system is designed by the back-EMF voltage at maximum speed of the PMSM. In general, the drive systems have used the constant DC link voltage without reference to the motor speed. The current ripple causes hysteresis loss and makes noise. In addition, the switching loss on the inverter increases in proportion to the rise in the DC link voltage. In this paper, we propose the variable DC link voltage control method to reduce the current ripple in the PMSM drive system. We show reduction effect of the current repple and the switching loss through simulation results.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2005년도 전력전자학술대회 논문집
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• pp.436-438
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• 2005

This paper presents a Zero-Current Switching(ZCS) two-transformer phase-shift full-bridge(TTFB) converter using voltage ripple. The proposed converter provides Zero-Voltage Switching(2VS) of leading leg switches and ZCS of lagging leg switches using volt-age ripple. Especially, circulating current Is reduced by ZCS operation and there are no additional components required for the soft switching of power switches. Furthermore, in case of light load, ZVS operation of lagging leg can be achieved. The operations, analysis and design consideration of proposed converter are presented. To verify the validity of the proposed converter, experimental results for a flow (205V, 2A) prototype are presented.

• Journal of Power Electronics
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• 제12권2호
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• pp.249-257
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• 2012

An interleaved PWM converter is proposed to implement the features of zero voltage switching (ZVS), load current sharing and ripple current reduction. The proposed converter includes two ZVS converters with a common clamp capacitor. With the shared capacitor, the charge balance of the two interleaved parts is automatically regulated under input voltage and load variations. The active-clamping circuit is used to realize the ZVS turn-on so that the switching losses on the power switches are reduced. The ZVS turn-on of all of the switching devices is achieved during the transition interval. The interleaved pulse-width modulation (PWM) operation will reduce the ripple current and the size of the input and output capacitors. The current double rectifier (CDR) is adopted in the secondary side to reduce output ripple current so that the sizes of the output chokes and capacitor are reduced. The circuit configuration, operation principles and design considerations are presented. Finally experimental results based on a 408W (24V/17A) prototype are provided to verify the effectiveness of the proposed converter.

• Journal of Power Electronics
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• 제19권4호
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• pp.907-921
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• 2019

This paper presents two advanced hybrid pulse-width modulation (PWM) strategies for multilevel inverters (MLIs) that provide both common-mode voltage (CMV) elimination and current ripple reduction. The first PWM utilizes sequences that apply one switching state at the double ends of a half-carrier cycle. The second PWM combines the advantages of the former and an existing four-state PWM. Analyses of the harmonic characteristics of the two groups of switching sequences based on a general switching voltage model are carried out, and algorithms to optimize the current ripple are proposed. These methods are simple and can be implemented online for general n-level inverters. Using a three-level NPC inverter and a five-level CHB inverter, good performances in terms of the root mean square current ripple are obtained with the proposed PWM schemes as indicated through improved harmonic distortion factors when compared to existing schemes in almost the entire region of the modulation index. This also leads to a significant reduction in the current total harmonic distortion. Simulation and experimental results are provided to verify the effectiveness of the proposed PWM methods.

• Journal of Power Electronics
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• 제15권6호
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• pp.1429-1437
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• 2015

A new parallel hybrid soft switching converter with low circulating current losses during the freewheeling state and a low output current ripple is presented in this paper. Two circuit modules are connected in parallel using the interleaved pulse-width modulation scheme to provide more power to the output load and to reduce the output current ripple. Each circuit module includes a three-level converter and a half-bridge converter sharing the same lagging-leg switches. A resonant capacitor is adopted on the primary side of the three-level converter to reduce the circulating current to zero in the freewheeling state. Thus, the high circulating current loss in conventional three-level converters is alleviated. A half-bridge converter is adopted to extend the ZVS range. Therefore, the lagging-leg switches can be turned on under zero voltage switching from light load to full load conditions. The secondary windings of the two converters are connected in series so that the rectified voltage is positive instead of zero during the freewheeling interval. Hence, the output inductance of the three-level converter can be reduced. The circuit configuration, operation principles and circuit characteristics are presented in detail. Experiments based on a 1920W prototype are provided to verify the effectiveness of the proposed converter.

• 전력전자학회논문지
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• 제2권2호
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• pp.49-56
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• 1997

스위치드 리럭턴스 전동기(switched reluctance motor : 이하 SRM 이라 칭함)는 가변 인덕턴스 프로파일의 비선형성과 리플성분이 포함된 펄스전류에 구동되는 본질적인 특성 때문에 토오크는 맥동성분을 포함한다. 본 논문에서는 토오크의 맥동에 영향을 미치는 전류파형 형태를 고찰하고, 속도나 부하에 관계없이 어드밴스 각(advance angle)와 여자전압을 제어함으로써 토오크 맥동을 저감할 수 있는 단일 펄스모드 스위칭 제어방법을 제안하였다. 그리고 설계 제작된 6/4 SRM을 이용하여 제안한 스위칭 제어방법의 타당성을 실험적으로 확인하였다.

• Journal of Power Electronics
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• 제16권6호
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• pp.1991-2004
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• 2016

An LC filter is required to reduce the output current ripple in the auxiliary resonant snubber inverter (ARSI) for high-performance applications. However, if the traditional control method is used in the ARSI with LC filter, then unnecessary current flows in the auxiliary circuit. In addressing this problem, a novel load-adaptive control that fully uses the filter inductor current ripple to realize the soft-switching of the main switches is proposed. Compared with the traditional control implemented in the ARSI with LC filter, the proposed control can reduce the required auxiliary current, contributing to higher efficiency and DC-link voltage utilization. In this study, the detailed circuit operation in the light load mode (LLM) and the heavy load mode (HLM) considering the inductor current ripple is described. The characteristics of the improved ARSI are expressed mathematically. A prototype with 200 kHz switching frequency, 80 V DC voltage, and 8 A maximum output current was developed to verify the effectiveness of the improved ARSI. The proposed ARSI was found to successfully operate in the LLM and HLM, achieving zero-voltage switching (ZVS) of the main switches and zero-current switching (ZCS) of the auxiliary switches from zero load to full load. The DC-link voltage utilization of the proposed control is 0.758, which is 0.022 higher than that of the traditional control. The peak efficiency is 91.75% at 8 A output current for the proposed control, higher than 89.73% for the traditional control. Meanwhile, the carrier harmonics is reduced from -44 dB to -66 dB through the addition of the LC filter.

• 전력전자학회논문지
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• 제17권2호
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• pp.182-189
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• 2012

In this paper, the input current and output voltage ripple of the soft switching interleaved boost converter was analyzed. Ripples of input current and output voltage with an interleaved method is analysed and as a result, the facts that it has lower ripple current than conventional interleaved method is verified. it means that a capacity of a main inductor can be reduced. Besides, a low capacitance of capacitor which means high lifetime and confidence can be used because of reducing ripples of output voltage. In order to verify the validity of the proposed converter used 10uF film capacitor, experiment was performed, and the efficiency of the proposed converter was measured with variable load and duty conditions.

• 전력전자학회논문지
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• 제19권3호
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• pp.220-226
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• 2014

Input current ripple and harmonic components of the power device are main causes of electromagnetic interference (EMI). Although the discontinuous conduction mode (DCM) operation can reduce harmonic components of the power device by reducing reverse recovery current of diode and turn-off voltage spikes of the switch, input current ripple increases due to high peak to peak inductor current. Therefore, in this paper, frequency control algorithm is proposed to reduce the input current ripple of DCM operated interleaved boost converter. In the proposed algorithm, duty ratio is fixed either 0.33 or 0.67 to minimize the input current ripple and the switching frequency is controlled according to operating conditions. 600 W 3-phase interleaved boost converter prototype system is built to verify proposed algorithm.

• Journal of Power Electronics
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• 제17권2호
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• pp.323-333
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• 2017

This paper proposes a model-based optimal control algorithm for the clamp switch of a zero-voltage switching (ZVS) bidirectional DC-DC converter. The bidirectional DC-DC converter (BDC) can accomplish the ZVS operation using the clamp switch. The minimum current for the ZVS operation is maintained, and the inductor current is separated from the input and output voltages by the clamp switch in this topology. The clamp switch can decrease the inductor current ripple, switching loss, and conduction loss of the system. Therefore, the optimal control of the clamp switch is significant to improve the efficiency of the system. This paper proposes a model-based optimal control algorithm using phase shift in a micro-controller unit. The proposed control algorithm is demonstrated by the results of PSIM simulations and an experiment conducted in a 1-kW ZVS BDC system.