• 전력전자학회논문지
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• 제7권2호
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• pp.111-120
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• 2002

멀티레벨 인버터 시스템은 낮은 고조파 성분과 높은 전력이 요구되는 분야에 매우 효율적인 시스템이다. 멀티레벨 인버터 시스템의 경우에 스위치 소자의 손실은 기존의 방법으로는 해석 할 수 없다. 그 이유는 각 스위치 소자의 손실이 2-레벨과는 다르게 서로 같지 않기 때문이다. 본 논문에서는 멀티레벨 인버터 시스템에 대한 전도 손실과 스위칭 손실의 간단하고 정확한 방법을 제안하였다. 제안된 방법의 타당함은 3-레벨과 4-레벨 다이오드 클램프드 인버터 시스템에 대해 증명하였다.

• Journal of Power Electronics
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• 제14권1호
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• pp.30-39
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• 2014

This paper studies a new three-level pulse-width modulation (PWM) resonant converter for high input voltage and high load current applications. In order to use high frequency power MOSFETs for high input voltage applications, a three-level DC converter with two clamped diodes and a flying capacitor is adopted in the proposed circuit. For high load current applications, the secondary sides of the proposed converter are connected in parallel to reduce the size of the magnetic core and copper windings and to decrease the current rating of the rectifier diodes. In order to share the load current and reduce the switch counts, three resonant converters with the same active switches are adopted in the proposed circuit. Two transformers with a series connection in the primary side and a parallel connection in the secondary side are adopted in each converter to balance the secondary side currents. To overcome the drawback of a wide range of switching frequencies in conventional series resonant converters, the duty cycle control is adopted in the proposed circuit to achieve zero current switching (ZCS) turn-off for the rectifier diodes and zero voltage switching (ZVS) turn-on for the active switches. Finally, experimental results are provided to verify the effectiveness of the proposed converter.

• 전력전자학회논문지
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• 제2권3호
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• pp.51-57
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• 1997

본 논문은 기존의 히스테리시스 전류 제어기에 N.P.C(Neutral-Point-Clamped) 인버터의 구조를 교류 전동기 시스템의 적용하므로서 전동기 시스템의 토오크 특성의 개선 및 손실의 원인이 되는 고조파 성분을 감소시키기 위한 기법을 제안하였다. 제안된 스위칭 기법은 기존의 히스테리시스 전류제어기를 적용하는 인버터와 비교하여 50%의 스위칭 주파수의 저감 효과를 기할 수 있다. 본 논문에서는 제안된 스위칭 기법의 특성을 기존의 스위칭 기법과 비교하여 시뮬레이션을 시행함으로서 제안된 스위칭 기법의 우수성을 입증하였다.

• Journal of Power Electronics
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• 제18권4호
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• pp.965-974
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• 2018

A new zero-voltage-switching (ZVS) push-pull pulse-width modulation (PWM) converter is proposed in this paper. The wide ZVS condition for all of the switches is obtained by utilizing the energy stored in the output inductor and magnetizing inductance. As a result, the switching losses can be dramatically reduced. A simple auxiliary circuit including two small diodes and one capacitor is added at the secondary side of a high frequency (HF) transformer to reset the primary current during the circulating stage and to clamp the voltage spike across the rectifier diodes, which enables the use of low-voltage and low-cost diodes to reduce the conducting and reverse recovery losses. In addition, there are no active devices or resistors in the auxiliary circuit, which can be realized easily. A detailed steady operation analysis, characteristics, design considerations, experimental results and a loss breakdown are presented for the proposed converter. A 500 W prototype has been constructed to verify the effectiveness of the proposed concept.

• Journal of Power Electronics
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• 제18권4호
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• pp.1015-1026
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• 2018

A family of dual-DC-input (DI) dual-buck inverters (DBIs) is proposed by employing a DI switching cell as the input of traditional DBIs. Three power ports, i.e. a low voltage DC input port, a high voltage DC input port and an AC output port, are provided by the proposed DI-DBIs. A low voltage DC source, whose voltage is lower than the peak amplitude of the AC side voltage, can be directly connected to the DI-DBI. This supplies power to the AC side in single-stage power conversion. When compared with traditional DBI-based two-stage DC/AC power systems, the conversion stages are reduced, and the power rating and power losses of the front-end Boost converter of the DI-DBI are reduced. In addition, five voltage-levels are generated with the help of the two DC input ports, which is a benefit in terms of reducing the voltage stresses and switching losses of switches. The topology derivation method, operation principles, modulation strategy and characteristics of the proposed inverter are analyzed in-depth. Experimental results are provided to verify the effectiveness and feasibility of the proposed DI-DBIs.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2001년도 하계학술대회 논문집 B
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• pp.946-949
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• 2001

This paper proposes a new zero-current switching (ZCS) pulse-width modulation (PWM) switch cell that has no additional conduction loss of the main switch. In this cell, the main switch and the auxiliary switch turn on and turn off under zero current condition. The diodes commutate softly and the reverse recovery problems are alleviated. The conduction loss and the current stress of the main switch are minimized, since the resonating current for the soft switching does not flow through the main switch. Based on the proposed ZCS PWM switch cell, a new family of dc to dc PWM converters is derived. The new family of ZCS PWM converters is suitable for the high power applications employing IGBTs. Among the new family of dc to dc PWM converters, a boost converter was taken as an example and has been analyzed. Design guidelines with a design example are described and verified by experimental results from the 2.5 kW prototype boost converter operating at 40kHz.

• 전기학회논문지
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• 제63권12호
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• pp.1640-1648
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• 2014

This paper proposes a switching frequency reduction method for MMC (Modular Multilevel Converter) utilizing redundancy operation of sub-module, which can offer reduction of voltage harmonics and switching loss. The feasibility of proposed method was verified through computer simulations with PSCAD/EMTDC software. Based on simulation analysis, a hardware scaled-model of 10kVA, DC-1000V MMC was designed and manufactured in the lab. Various experiments were conducted to verify the feasibility of proposed method in the actual hardware system. The hardware scaled-model can be effectively utilized for analyzing the performance of MMC according to the modulation scheme and redundancy operation.

• 전력전자학회논문지
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• 제9권2호
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• pp.178-186
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• 2004

본 연구에서는 3상 RCD(Random Pulse Centered Displacement) PWM기법에 비하여 구현이 용이하고 스위칭 주파수의 정수배 스펙트럼의 광대역화와 선형화의 효과가 우수한, 2상 RCD-PWM을 제안하였으며, 그 파워 스펙트럼을 비교하고 있다 종전의 3상 RCD-PWM과 제안된 2상 RCD-PWM을 구현하기 위하여, 16비트 고성능 마이크로 컨트롤러 SAB-Cl67이 사용되었다 SAB-C167에 의하여 각 변조 구간에서의 듀티비를 구한 후, 선형 랜덤 발생기를 이용하여 균일한 확률 분포로 각 상의 펄스의 위치를 재배치하였다. 제안된 2상 RCD-PWM에 의한 모터전압과 전류 그리고 직류링크 전류의 파워 스펙트럼 및 모터의 가청 스위칭 소음 효과를 종전의 3상 RCD-PWM과 비교 검토하였다

• 전력전자학회논문지
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• 제9권1호
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• pp.10-16
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• 2004

본 논문에서는 공진 에너지 회생율을 최대화하여 전체적인 효율을 증가시킨 개선된 전파형 ZVT(Zero-Voltage-Transition) PWM(Pulse-Width-Modulation) DC-DC 컨버터를 소개한다. 개선된 회로는 단지 기존 컨버터의 보조스위치와 공진형 인덕터 사이에 직렬로 역공진 저지 다이오드를 추가로 달아서 모든 스위칭 소자들이 소프트 스위칭 조건에서 턴온/턴오프하여 스위칭 손실을 최소화하고, 공진 에너지를 완전히 입력으로 회귀시켜 전도손실을 절감하여 효율의 증감을 이루었다. 본 논문에서는 부스터 컨버터를 이용하여 개선된 컨버터의 동작을 분석하고, 실험결과를 바탕으로 제안된 회로의 타당성을 입증하였다.

• Journal of Power Electronics
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• 제12권2호
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• pp.249-257
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• 2012

An interleaved PWM converter is proposed to implement the features of zero voltage switching (ZVS), load current sharing and ripple current reduction. The proposed converter includes two ZVS converters with a common clamp capacitor. With the shared capacitor, the charge balance of the two interleaved parts is automatically regulated under input voltage and load variations. The active-clamping circuit is used to realize the ZVS turn-on so that the switching losses on the power switches are reduced. The ZVS turn-on of all of the switching devices is achieved during the transition interval. The interleaved pulse-width modulation (PWM) operation will reduce the ripple current and the size of the input and output capacitors. The current double rectifier (CDR) is adopted in the secondary side to reduce output ripple current so that the sizes of the output chokes and capacitor are reduced. The circuit configuration, operation principles and design considerations are presented. Finally experimental results based on a 408W (24V/17A) prototype are provided to verify the effectiveness of the proposed converter.