• Journal of Power Electronics
• /
• v.18 no.2
• /
• pp.445-455
• /
• 2018

A novel algorithm is proposed to regulate the neutral point potential in neutral point clamped three-level inverters. Oscillations of the neutral point potential and an unbalanced dc-link voltage cause distortions of the output voltage. Large capacitors, which make the application costly and bulky, are needed to eliminate oscillations. Thus, the algorithm proposed in this paper utilizes the finite-control-set model predictive control and the multistage medium vector to solve these issues. The proposed strategy consists of a two-step prediction and a cost function to evaluate the selected multistage medium vector. Unlike the virtual vector method, the multistage medium vector is a mixture of the virtual vector and the original vector. In addition, its amplitude is variable. The neutral point current generated by it can be used to adjust the neutral point potential. When compared with the virtual vector method, the multistage medium vector contributes to decreasing the regulation time when the modulation index is high. The vectors are rearranged to cope with the variable switching frequency of the model predictive control. Simulation and experimental results verify the validity of the proposed strategy.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.13 no.3
• /
• pp.239-254
• /
• 1988

In this paper an exciter which performs modulation and amplification is composed of high power(30dBm) VCO(Voltage Controlled Oscillator) using push-pull circuit. Modulation is FSK using PLL(Phase Locked Loop). A single loop PLL synthesizer having sequency range of 42.5-100.5MHz, 25KHz channel spacing and switching time of 1msec converts down the exciter VCO frequency to 1.25MHz. This signal mixed with the FSK modulated signal coming in the phase detector of exciter. The acquisition time of exciter for frequency hoppng is less than 200usec, so the total acquisition time for transmission is less that 1.5msec. There is no need of additional power amplification because power amlifiction by high power VCO is high enough to communicate within near distance. The proposed frequency synthesizer is not complex so it is suitable for low cost slow frequency hopping spread spectrum communication.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
• /
• v.7 no.4
• /
• pp.310-319
• /
• 1996

The existing coders used in the fading channels are designed under the assumption that the ideal interleaver, which removes the fading correlation of the channel, is used. With the non-ideal interleaver of finite size, however, the performance of the coded modulation system degrades rapidly when the fading is very slow. A new method which achieves interleaving effects by switching the transmitter antennas is suggested to improve the performance even in the slow fading. The performance of the new system is analyzed. The results show significant performance improvement in the slow fading and at least no deterioration in the fast fading over the existing systems.

• Journal of Power Electronics
• /
• v.13 no.5
• /
• pp.829-840
• /
• 2013

The modified sinusoidal pulse-width modulation (SPWM) is one of the PWM techniques used in three-phase AC-DC buck converters. The modified SPWM works without the current sensor (the converter is current sensorless), improves production of sinusoidal AC current, enables obtainment of near-unity power factor, and controls output voltage through modulation gain (ranging from 0 to 1). The main problem of the modified SPWM is the huge starting current and voltage (during transient) that results from a large step change from the reference voltage. When the load changes, the output voltage significantly drops (through switching losses and non-ideal converter elements). The single-input single-output (SISO) approach with minor-loop voltage feedback controller presented here overcomes this problem. This approach is created on a theoretical linear model and verified by discrete-model simulation on MATLAB/Simulink. The capability and effectiveness of the SISO approach in compensating start-up current/voltage and in achieving zero steady-state error were tested for transient cases with step-changed load and step-changed reference voltage for linear and non-linear loads. Tests were done to analyze the transient performance against various controller gains. An experiment prototype was also developed for verification.

• Journal of Power Electronics
• /
• v.17 no.1
• /
• pp.67-75
• /
• 2017

Due to the excessive zero-sequence voltage in dual three-level inverter fed open-end winding induction motor systems, zero-sequence circumfluence which is harmful to switching devices and insulation is then formed when operating in a single DC voltage source supplying mode. Traditionally, it is the mean value instead of instantaneous value of the zero-sequence voltage that is eliminated, through adjusting the durations of the operating vectors. A new strategy is proposed for zero-sequence voltage elimination, which utilizes unified voltage modulation and a decoupled SVPWM strategy to achieve two same-sized equivalent vectors for an angle of $120^{\circ}$, generated by two inverters independently. Both simulation and experimental results have verified its efficiency in the instantaneous value elimination of zero-sequence voltage.

• Journal of IKEEE
• /
• v.14 no.3
• /
• pp.250-255
• /
• 2010

The interleaved power management IC(PMIC) with DTMOS(Dynamic Threshold voltage MOSFET) switching device is proposed in this paper. The buck-boost converter used to provide the high output voltage and low output voltage for portable applications. Also we used the PWM(Pulse Width Modulation) control method for high power efficiency at high current level. DTMOS with low on-resistance is designed to decrease conduction loss. The interleaved PMIC to reduce output ripple. And step-down DC-DC converter in stand-by mode below 1mA is designed with LDO in order to achive high efficiency.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
• /
• 2012.10a
• /
• pp.611-614
• /
• 2012

Space-Time Block Code (STBC) is a simple transmit diversity scheme mitigating detrimental effects of fading channel. However, STBC receivers require channel knowledge and suffer from inaccurate channel estimation. Differential Space-Time Modulation (DSTM) renders the receiver a choice of coherent detection or non-coherent detection, depending on the availability of the channel information. Based on the simulated BER performances of these two schemes over various normalized Doppler frequency scenarios using LTE-like parameters, a benefit of adaptively switching the receiver type is investigated.

• The Transactions of The Korean Institute of Electrical Engineers
• /
• v.57 no.7
• /
• pp.1187-1194
• /
• 2008

This paper presents a high-power electronic ballast for a metal-hallide lamp(MHL) that employs frequency modulation(FM) technique to eliminate acoustic resonance(AR). The proposed ballast consists of a full-bridge rectifier, a power factor correction(PFC) circuit, a full-bridge(FB) inverter, an ignitor using LC resonance and an FM control circuit. Whereas a manual PFC provides advantages in terms of high reliability and low cost for constructing the circuit, it is difficult to supply a stable voltage because of the output voltage ripple that occurs with a period of 120Hz. Although the ballast can be designed with a small size and a light weight if it is driven at a switching frequency between 1 and 100 kHz, AR will occur if the eigen-value frequency of the lamp coincides with the inverter's operation frequency. The operation frequency was modulated in real time according to the output voltage ripple to compensate for the variation in power supplied to the lamp and eliminate AR. Performance of the proposed technique was validated through numerical analysis, computer simulation using PSPICE and by applying it to an electronic ballast for a prototype 1kW MHL.

• Journal of Power Electronics
• /
• v.17 no.5
• /
• pp.1173-1185
• /
• 2017

In this paper, a new single phase multilevel inverter topology with a single DC source is presented. The proposed topology is developed based on the concepts of the L-Z source inverter and the switched capacitor multilevel inverter. The input voltage to the proposed inverter is boosted by two steps: the first step by an impedance network and the second step by switched capacitor units. Compared to other existing topologies, the presented topology can produce a higher boosted multilevel output voltage while using a smaller number of components. In addition, it provides more flexibility to control boosting factor, size, cost and complexity of the inverter. The proposed inverter possesses all the advantages of the L-Z source inverter and the switched capacitor multilevel inverter like controlling the start-up inrush current and capacitor voltage balancing using a simple switching strategy. The operating principle and general expression for the different parameters of the proposed topology are presented in detail. A phase disposition pulse width modulation strategy has been developed to switch the inverter. The effectiveness of the topology is verified by extensive simulation and experimental studies on a 7-level inverter structure.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
• /
• v.9 no.1
• /
• pp.947-950
• /
• 2005

For revolving and elevating a turret of a tank, we substitute an existing oil pressure system with an electric system using a motor and applied the vector control method to this system. A switching method of an inverter for providing desired sinusoidal current to each phase of a motor, we adopted min-max pulse width modulation method which takes less computation time, rather than space vector pulse width modulation method. We designed a digital filter and applied it to the control system. Developed current controller is verified it's performance through a current control test, speed control test, frequency response and tracking a profile of speed test.