• 제목/요약/키워드: Susceptor design

검색결과 7건 처리시간 0.024초

Susceptor design by numerical analysis in horizontal CVD reactor

  • Lee, Jung-Hun;Yoo, Jin-Bok;Bae, So-Ik
    • 한국결정성장학회지
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    • 제15권4호
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    • pp.135-140
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    • 2005
  • Thermal-fluid analysis was performed to understand the thermal behavior in the horizontal CVD reactor thereby to design a susceptor which has a uniform deposition rate during silicon EPI growing. Four different types of susceptor designs, standard (no hole susceptor), hole $\sharp$1 (240 mm), hole $\sharp$2 (150 mm) and hole $\sharp$3 (60 mm), were simulated by CFD (Computational Fluid Dynamics) tool. Temperature, gas flow, deposition rate and growth rate were calculated and analyzed. The degree of flatness of EPI wafer loaded on the susceptor was computed in terms of silicon growth rate. The simulation results show that the temperature and thermal distribution in the wafer are greatly dependent on inner diameter of hole susceptor and demonstrate that the introduction of hole in the susceptor can degrade wafer flatness. Maximum temperature difference appeared around holes. As the diameter of the hole decreases, flatness of the wafer becomes poor. Among the threes types of susceptors with the hole, optimal design which resulted a good uniform flatness ($5\%$) was obtained when using hole $\sharp$1.

온도 균일도 향상을 위한 대면적 서셉터의 설계 및 성능 시험 (Design and Performance Test of Large-Area Susceptor for the Improvement of Temperature Uniformity)

  • 양학진;김성근;조중근
    • 한국산학기술학회논문지
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    • 제16권6호
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    • pp.3714-3721
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    • 2015
  • 서셉터 히터에서 쉬스 열선을 사용하는 방법이 일반화되어 있지만, 대면적 초고온 조건에서는 서셉터의 온도 균일도 성능 저하의 문제가 있다. 본 연구에서는 온도균일도 성능을 향상시킬 수 있도록 판형 형태의 열선을 기본으로 새로운 서셉터를 설계하여 프로토타입을 개발하였다. 표면 온도 $450^{\circ}C$의 고온에서 1.4% 이내로 온도 균일도가 시제작된 서셉터에서 검증될 수 있었다. 또한 온도 학습 데이터를 이용하여 측정 온도 데이터를 예측할 수 있는 커널 회귀 알고리즘을 개발하고, 이러한 예측 데이터와 측정 데이터의 비교 분석으로 균일도 측정 온도의 신뢰성을 확인할 수 있었다.

Si 선택적 성장을 위한 대형 CVD 반응기 내의 열 및 유동해석 (Analysis on the Flow and Heat Transfer in a Large Scale CVD Reactor for Si Epitaxial Growth)

  • 장연호;고동국;임익태
    • 반도체디스플레이기술학회지
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    • 제15권1호
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    • pp.41-46
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    • 2016
  • In this study, gas flow and temperature distribution in the multi-wafer planetary CVD reactor for the Si epitaxial growth were analyzed. Although the structure of the reactor was simplified as the first step of the study, the three-dimensional analysis was performed taking all these considerations of the revolution of the susceptor and the rotation of satellites into account. From the analyses, a reasonable velocity field and temperature field were obtained. However, it was found that analyses including the upper structure of the reactor were required in order to obtain more realistic temperature results. DCS mole fraction above the satellite surface and the susceptor surface without satellite was compared in order to check the gas species mixing. We found that satellite rotation helped gases to mix in the reactor.

Numerical Study on Flow and Heat Transfer in a CVD Reactor with Multiple Wafers

  • Jang, Yeon-Ho;Ko, Dong Kuk;Im, Ik-Tae
    • 반도체디스플레이기술학회지
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    • 제17권4호
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    • pp.91-96
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    • 2018
  • In this study temperature distribution and gas flow inside a planetary type reactor in which a number of satellites on a spinning susceptor were rotating were analyzed using numerical simulation. Effects of flow rates on gas flow and temperature distribution were investigated in order to obtain design parameters. The commercial computational fluid dynamics software CFD-ACE+ was used in this study. The multiple-frame-of-reference was used to solve continuity, momentum and energy conservation equations which governed the transport phenomena inside the reactor. Kinetic theory was used to describe the physical properties of gas mixture. Effects of the rotation speed of the satellites was clearly seen when the inlet flow rate was small. Thickness of the boundary layer affected by the satellites rotation became very thin as the flow rate increased. The temperature field was little affected by the incoming flow rate of precursors.

Study on the Coupled Effects of Process Parameters on Silicon Growth Using Chemical Vapor Deposition

  • Ramadan, Zaher;Ko, Dong Kuk;Im, Ik-Tae
    • 반도체디스플레이기술학회지
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    • 제18권3호
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    • pp.115-121
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    • 2019
  • Response surface methodology (RSM) is used to investigate the complex coupling effects of different operating parameters on silicon growth rate in planetary CVD reactor. Based on the computational fluid dynamics (CFD) model, an accurate RSM model is obtained to predict the growth rate with different parameters, including temperature, pressure, rotation speed of the wafer, and the mole fraction of dichlorosilane (DCS). Analysis of variance is used to estimate the contributions of process parameters and their interactions. Among the four operating parameters that have been studied, the influences of susceptor temperature and the operating pressure were the most significant factors that affect silicon growth rate, followed by the mole fraction of DCS. The influence of wafer rotation is the least. The validation tests show that the results of silicon deposition rate obtained from the regression model are in good agreement with those from CFD model and the maximum deviations is 2.15%.

Planetary 형 반응기에서 웨이퍼와 기판 사이의 틈새가 웨이퍼 온도에 미치는 영향에 대한 연구 (Numerical Study on Wafer Temperature Considering Gap between Wafer and Substrate in a Planetary Reactor)

  • ;정종완;임익태
    • 반도체디스플레이기술학회지
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    • 제16권3호
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    • pp.1-7
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    • 2017
  • Multi-wafer planetary type chemical vapor deposition reactors are widely used in thin film growth and suitable for large scale production because of the high degree of growth rate uniformity and process reproducibility. In this study, a two-dimensional model for estimating the effect of the gap between satellite and wafer on the wafer surface temperature distribution is developed and analyzed using computational fluid dynamics technique. The simulation results are compared with the results obtained from an analytical method. The simulation results show that a drop in the temperature is noticed in the center of the wafer, the temperature difference between the center and wafer edges is about $5{\sim}7^{\circ}C$ for all different ranges of the gap, and the temperature of the wafer surface decreases when the size of the gap increases. The simulation results show a good agreement with the analytical ones which is based on one-dimensional heat conduction model.

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Process Optimization of PECVD SiO2 Thin Film Using SiH4/O2 Gas Mixture

  • Ha, Tae-Min;Son, Seung-Nam;Lee, Jun-Yong;Hong, Sang-Jeen
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2012년도 제42회 동계 정기 학술대회 초록집
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    • pp.434-435
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    • 2012
  • Plasma enhanced chemical vapor deposition (PECVD) silicon dioxide thin films have many applications in semiconductor manufacturing such as inter-level dielectric and gate dielectric metal oxide semiconductor field effect transistors (MOSFETs). Fundamental chemical reaction for the formation of SiO2 includes SiH4 and O2, but mixture of SiH4 and N2O is preferable because of lower hydrogen concentration in the deposited film [1]. It is also known that binding energy of N-N is higher than that of N-O, so the particle generation by molecular reaction can be reduced by reducing reactive nitrogen during the deposition process. However, nitrous oxide (N2O) gives rise to nitric oxide (NO) on reaction with oxygen atoms, which in turn reacts with ozone. NO became a greenhouse gas which is naturally occurred regulating of stratospheric ozone. In fact, it takes global warming effect about 300 times higher than carbon dioxide (CO2). Industries regard that N2O is inevitable for their device fabrication; however, it is worthwhile to develop a marginable nitrous oxide free process for university lab classes considering educational and environmental purpose. In this paper, we developed environmental friendly and material cost efficient SiO2 deposition process by substituting N2O with O2 targeting university hands-on laboratory course. Experiment was performed by two level statistical design of experiment (DOE) with three process parameters including RF power, susceptor temperature, and oxygen gas flow. Responses of interests to optimize the process were deposition rate, film uniformity, surface roughness, and electrical dielectric property. We observed some power like particle formation on wafer in some experiment, and we postulate that the thermal and electrical energy to dissociate gas molecule was relatively lower than other runs. However, we were able to find a marginable process region with less than 3% uniformity requirement in our process optimization goal. Surface roughness measured by atomic force microscopy (AFM) presented some evidence of the agglomeration of silane related particles, and the result was still satisfactory for the purpose of this research. This newly developed SiO2 deposition process is currently under verification with repeated experimental run on 4 inches wafer, and it will be adopted to Semiconductor Material and Process course offered in the Department of Electronic Engineering at Myongji University from spring semester in 2012.

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