• 제목/요약/키워드: Standard damage control diagram

검색결과 2건 처리시간 0.015초

손상통제 함상훈련 시나리오의 효율적 생성에 관한 연구 (A Study on the Efficient Generation of Damage Control Onboard Training Scenarios for Naval Ships)

  • 정재수;이현엽;정정훈;김태진;김숙경
    • 대한조선학회논문집
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    • 제56권5호
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    • pp.457-463
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    • 2019
  • Damage control is a very important preliminary and primary activity to improve the survivability of naval ships by preventing spread of damage, and various types of onboard damage control training are conducted regularly on naval ships. The scenarios for these trainings should be well organized to improve the training efficiency. However, at present, it takes much time and effort to generate the training scenarios and there is a problem that the procedures and contents of the scenarios vary widely depending on the persons who generate, without the established methods and standards. In this paper, an efficient generation method of damage control onboard training scenarios has been established, especially for flood and fire o n naval ships. Also a computer program has been developed based on the established method. The results showed that this method and computer program reduce the time and effort to generate these scenarios, and it is hoped that the method be used as a ROK Navy Standard.

온라인 설계 맵핑을 이용한 웹 기반 디지털 논리 회로 가상 실험 시스템의 구현 (Implementation of a Web-based Virtual Laboratory System for Digital Logic Circuits Using Online Schematic Mapping)

  • 김동식;서삼준
    • 제어로봇시스템학회논문지
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    • 제11권6호
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    • pp.558-563
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    • 2005
  • In this paper, we implemented a web-based virtual laboratory system(VLab system) with creative and interactive multimedia contents, which can be used to enhance the quality of education in the area of digital logic circuits. Since the proposed VLab system is implemented to describe the on-campus laboratory, the learners can obtain similar experimental data through it. Also, the VLab system is designed to increase the learning and teaching efficiencies of both the learners and the educators, respectively. The learners will be able to achieve high teaming standard and the educators save their time and labor. The virtual experiments on our VLab system are performed according to the following procedure: (1) Circuit composition on the virtual bread board (2). Applying input voltage (3) Output measurements (4) Checkout of experiment results. Furthermore, the circuit composition on the virtual bread board and its corresponding online schematic diagram are displayed together on the VLab system for the learner's convenience. Finally, we have obtained several affirmative effects such as reducing the total experimental hours and the damage rate for experimental equipments and increasing learning efficiencies as well as faculty productivity.