• Journal of the Korean Society for Aeronautical & Space Sciences
• /
• v.42 no.6
• /
• pp.445-452
• /
• 2014

This paper discusses the multifrontal direct solution method with out of core storage for large scale structural analysis in a limited computing resource. Large scale structural analysis requires huge amount of memory space and computation, so out of core solution method is needed in limited computing resource. In this research, out of core multifrontal solution algorithm which utilize the small size of physical memory and minimize the amount of access of low speed out of core storage is introduced. Three ideas, which are stack space in lower trianglar part of square factorization matrix, inverse stack data structure and selective data caching and recovery by data block size, are proposed.

• The Journal of the Korea institute of electronic communication sciences
• /
• v.15 no.4
• /
• pp.717-724
• /
• 2020

Due to the important role played by emotion in human interaction, affective computing is dedicated in trying to understand and regulate emotion through human-aware artificial intelligence. By understanding, emotion mental diseases such as depression, autism, attention deficit hyperactivity disorder, and game addiction will be better managed as they are all associated with emotion. Various studies for emotion recognition have been conducted to solve these problems. In applying machine learning for the emotion recognition, the efforts to reduce the complexity of the algorithm and improve the accuracy are required. In this paper, we investigate emotion Electroencephalogram (EEG) feature reduction and classification using Stack AutoEncoder (SAE) and Long-Short-Term-Memory/Recurrent Neural Networks (LSTM/RNN) classification respectively. The proposed method reduced the complexity of the model and significantly enhance the performance of the classifiers.

• 제어로봇시스템학회:학술대회논문집
• /
• 2005.06a
• /
• pp.414-420
• /
• 2005

The ShortStack Micro Server enables any product that contains a microcontroller or microprocessor to quickly and inexpensively become a networked, Internet-accessible device. The ShortStack Micro Server provides a simple way to add LonWorks networking to new or existing smart devices. . It implements the LonTalk protocol and provides the physical interface with the LonWorks communication. The ShortStack host processor can be an 8, 16, or 32-bit microprocessor or microcontrollers. The ShortStack API and driver typically require about 4kbytes of program memory on the host processor and less than 200 bytes of RAM. The interface between host processor and the ShortStack Micro Server may be a Serial Communication Interface (SCI). The LonWorks control module with a high performance is developed, which is composed of the 8 bit PIC Microprocessor for host processor and the smart neuron chip for the ShortStack Micro Server. This intelligent control board is verified as proceeding the various function tests from experimental system with an boost pump and inverter driving systems. It is also confirmed that the developed control module provides stably 0-10VDC linear signal to the input signal of inverter driving system for varying the induction motor speed. Thus, the experimental results show that the fabricating intelligent board carried out very well the various functions in the wide operating ranges of boost pump system. This developed control module expect to apply to industrial fields to require the comparatively exact control and monitoring such as multi-motor driving system with inverter, variable air volume system and the boost pump water supply systems.

• Proceedings of the Korean Vacuum Society Conference
• /
• 2011.02a
• /
• pp.77-77
• /
• 2011

These days, a growing demand for memory device is filled up with the flash memory and the dynamic random access memory (DRAM). Although DRAM is a reasonable solution for current demand, the universal novel memory with high density, high speed and nonvolatility, needs to be developed. Among various new memories, the magnetic random access memory (MRAM) device is considered as one of good candidate memories because of excellent features including high density, high speed, low operating power and nonvolatility. The etching of MTJ stack which is composed of magnetic materials and insulator such as MgO is one of the vital process for MRAM. Recently, MgO has attracted great interest in the MTJ stack as tunneling barrier layer for its high tunneling magnetoresistance values. For the successful realization of high density MRAM, the etching process of MgO thin films should be investigated. Until now, there were some works devoted to the investigations on etch characteristics of MgO thin films. Initially, ion milling was applied to the etching of MgO thin films. However, ion milling has many disadvantages such as sidewall redeposition and etching damage. High density plasma etching containing the magnetically enhanced reactive ion etching and high density reactive ion etching have been employed for the improvement of etching process. In this work, inductively coupled plasma reactive ion etching (ICPRIE) system was adopted for the improvement of etching process using MgO thin films and etching gas mixes of $CH_4$/Ar and $CH_4$/$O_2$/Ar have been employed. The etch rates are measured by a surface profilometer and etch profiles are observed using field emission scanning emission microscopy (FESEM). The effects of gas concentration and etch parameters such as coil rf power, dc-bias voltage to substrate, and gas pressure on etch characteristics will be systematically explored.

• Proceedings of the International Microelectronics And Packaging Society Conference
• /
• 2005.09a
• /
• pp.111-129
• /
• 2005

Pop provides OEMs and EMS with a platform to cost effectively expand options for logic + memory 3D integration - Expands device options by simplifying business logistics of stacking - Integration controlled at the system level to best match stacked combinations with system requirements - Eliminates margin stacking and expands technology reuse - Helps manage the huge cost impacts associated with increasing demand for multi media processing and memory. PoP is well timed to enable and leverage: - Mass customization of systems for different use (form, fit and function) requirements o Bband and apps processor + memory stack platforms - Logic transition to flip chip enables PoP size reduction o Area and height reduction. Industry standardization is progressing. Amkor provides full turn-key support for base package, memory package and full system integration.

• International journal of advanced smart convergence
• /
• v.9 no.3
• /
• pp.253-259
• /
• 2020

Most of today's large-scale cloud systems and enterprise data centers are distributing resources to improve scalability and resource utilization. NVMe-over-Fabric protocol allows submitting NVMe commands to a remote NVMe SSD through RDMA (Remote Direct Memory Access) network. It is attracting attention recently because it is possible to construct a disaggregation storage system with low latency through the protocol. However, the current I/O stack of NVMe-over-Fabric has an inefficient structure for maintaining compatibility with the traditional I/O stack. Therefore, in this paper, we propose a new mechanism to reduce I/O latency and CPU overhead by modifying I/O path of NVMe-over-Fabric to pass through legacy block layer. According to the performance evaluation results, the proposed mechanism is able to reduce the I/O latency and CPU overhead by up to 22% and 24% compared to the existing NVMe-over-Fabrics protocol, respectively.

• Proceedings of the IEEK Conference
• /
• 2003.07b
• /
• pp.927-930
• /
• 2003

In this paper, a design of processor IP for TCP/IP protocol stack is described. The processor consists of input and output buffer memory with dual bank structure, 32-bit RISC microprocessor core, DMA unit with on-the-fly checksum capability. To handle the various modes of TCP/IP protocol, hardware and software co-design approach is used rather than the conventional state machine based design. To eliminate delay time due to the data transfer and checksum operation, DAM module which can execute the checksum operation on-the-fly along with data transfer operation is adopted. By programming the on-chip code ROM of RISC processor differently. the designed stack processor can support the packet format conversion operations required in the various TCP/IP protocols.

• ETRI Journal
• /
• v.33 no.6
• /
• pp.904-913
• /
• 2011

Three-dimensional (3D) memories using through-silicon vias (TSVs) as vertical buses across memory layers will likely be the first commercial application of 3D integrated circuit technology. The memory dies to stack together in a 3D memory are selected by a die-selection method. The conventional die-selection methods do not result in a high-enough yields of 3D memories because 3D memories are typically composed of known-good-dies (KGDs), which are repaired using self-contained redundancies. In 3D memory, redundancy sharing between neighboring vertical memory dies using TSVs is an effective strategy for yield enhancement. With the redundancy sharing strategy, a known-bad-die (KBD) possibly becomes a KGD after bonding. In this paper, we propose a novel die-selection method using KBDs as well as KGDs for yield enhancement in 3D memory. The proposed die-selection method uses three search-space conditions, which can reduce the search space for selecting memory dies to manufacture 3D memories. Simulation results show that the proposed die-selection method can significantly improve the yield of 3D memories in various fault distributions.

• KIPS Transactions on Computer and Communication Systems
• /
• v.12 no.9
• /
• pp.283-290
• /
• 2023

With the recent steady development of IoT technology, it is widely used in medical systems and smart TV watches. 66% of software development is developed through language C, which is vulnerable to memory attacks, and acts as a threat to IoT devices using language C. A stack-smashing overflow attack inserts a value larger than the user-defined buffer size, overwriting the area where the return address is stored, preventing the program from operating normally. IoT devices with low memory capacity are vulnerable to stack smashing overflow attacks. In addition, if the existing vaccine program is applied as it is, the IoT device will not operate normally. In order to defend against stack smashing overflow attacks on IoT devices, we used canaries among several detection methods to set conditions with random values, checksum, and DSLR (random storage locations), respectively. Two canaries were placed within the buffer, one in front of the return address, which is the end of the buffer, and the other was stored in a random location in-buffer. This makes it difficult for an attacker to guess the location of a canary stored in a fixed location by storing the canary in a random location because it is easy for an attacker to predict its location. After executing the detection program, after a stack smashing overflow attack occurs, if each condition is satisfied, the program is terminated. The set conditions were combined to create a number of eight cases and tested. Through this, it was found that it is more efficient to use a detection method using DSLR than a detection method using multiple conditions for IoT devices.

• Proceedings of the Korean Society Of Semiconductor Equipment Technology
• /
• 2007.06a
• /
• pp.250-250
• /
• 2007