• The Transactions of the Korean Institute of Power Electronics
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• v.21 no.6
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• pp.538-541
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• 2016

This paper proposes an LCL-filter design for space vector pulse width modulation (SVM) in grid-connected three-phase inverter systems. Although there are a several studies in progress, the existing methods are erroneous because they do not focus on the other switching methods. This paper presents the design methodology for an LCL-filter that is optimized for SVM switching operations. The design procedure for the LCL-filter is presented step-by-step. The inverter-side inductor was determined by an analysis of the ripple components, mathematically. Based on the reactive power absorption ratio, the filter capacitor was determined. The grid-side inductor was determined by the ripple attenuation factor of the output current. Experimental results verify the validity of the design method for the LCL-filter.

• Proceedings of the KIPE Conference
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• 1998.07a
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• pp.280-286
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• 1998

In this paper, space voltage vector pulsewidth modulation for 2-phase inverter is proposed. When this method is appled to 2-phase induction motor, the phase difference of voltage between phase A and B is fixed at $90^{\circ}$and amplitude of voltage of phase Ais same with that of phase B. This method have advantages over low-power servo system because this is simple method comparing to 3-phase space vector method which requires d-q transform.

• Journal of Power Electronics
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• v.12 no.3
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• pp.448-457
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• 2012

This paper proposes a carrier-based pulse width modulation (PWM) method to control an indirect matrix converter (IMC) by analyzing the relationship between the space vector PWM (SVPWM) and the carrier-based PWM. The complexity of the SVPWM method for an IMC can be reduced by using an equivalent carrier-based PWM method. The advantage of the proposed algorithm is its ability use only one symmetrical triangular carrier signal to generate the gate signals for all of the power switches in both the rectifier and inverter stages as compared to the conventional method where the carrier signal used in the rectifier stage is different from that of the inverter stage. In addition, by using a suitable offset voltage component in the modulation signals, the output voltage magnitude reaches 0.866 of the input voltage magnitude. Simulation and experimental results are provided in order to validate the proposed method.

• Journal of Power Electronics
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• v.18 no.5
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• pp.1424-1433
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• 2018

This paper presents a novel space vector pulse-width modulation (SVPWM) to synthesize an arbitrary non-sinusoidal phase voltage. The key of the proposed method is that the switching vectors used to comprise the reference vectors in the ${\alpha}_1-{\beta}_1$ frame and the ${\alpha}_3-{\beta}_3$ frame are decoupled. In the ${\alpha}_1-{\beta}_1$ frame, the reference vector is comprised by near two large vectors. The corresponding vector comprised by the two vectors in the ${\alpha}_3-{\beta}_3$ frame is considered as a disturbance, which is restrained by close-loop control. In the ${\alpha}_3-{\beta}_3$ frame, there are two methods to comprise the reference vector. Method I is a near two middle vectors method. Method II uses near four vectors (two middle and two little vectors). The proposed SVPWM using decoupled switching vectors can guarantee a maximum modulation index in the ${\alpha}_1-{\beta}_1$ frame. The effectiveness of the proposed method is verified by simulated and experimental results under various operation conditions.

• Journal of Power Electronics
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• v.19 no.3
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• pp.727-743
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• 2019

This paper presents a pulse-width modulation strategy to eliminate the common mode voltage (CMV) with reduced CMV spikes in multilevel inverters since a high CMV magnitude and its fast variations dv/dt result in bearing failure of motors, overvoltage at motor terminals, and electromagnetic interference (EMI). The proposed method only utilizes the zero CMV states in a space vector diagram and it is implemented by a carrier-based pulse-width modulation (CBPWM) method. This method is generalized for odd number levels of inverters including neutral-point-clamped (NPC) and cascaded H-bridge inverters. Then it is extended to the over-modulation mode. The over-modulation mode is implemented by using the two-limit trajectory principle to maintain linear control and to avoid look-up tables. Even though the CMV is eliminated, CMV spikes that can cause EMI and bearing current problems still exist due to the deadtime effect. As a result, the deadtime effect is analyzed. By taking the deadtime effect into consideration, the proposed method is capable of reducing CMV spikes. Simulation and experimental results verify the effectiveness of the proposed strategy.

• Proceedings of the KIPE Conference
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• 2016.11a
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• pp.230-231
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• 2016

본 논문은 공간벡터 변조 방법에서부터 Six-step 동작까지의 새로운 과변조 방법을 제시하였다. 극전압을 푸리에 시리즈를 이용하여 분석하였고 지령 상전압에서부터 펄스 폭 변조 스위칭 신호까지의 알고리즘을 제안하였다. Matlab 시뮬레이션을 통해 검증하였다.

• Proceedings of the KIPE Conference
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• 1998.10a
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• pp.159-164
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• 1998

This paper proposes a SVPWM (space vector pulse width modulation) strategy for a multi-level voltage source inverter. This strategy is easily implemented as SPWM (sinusoidal pulse width modulation) and has the same DC-link voltage utilization as general SVPWM. The method to keep the voltage balancing of DC-link also is proposed by the analysis model of DC-link voltage fluctuation. The usefulness of the proposed SVPWM is verified through the simulation.

• The Transactions of the Korean Institute of Power Electronics
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• v.26 no.2
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• pp.135-140
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• 2021

This study introduces a new pulse width modulation (PWM) method to reduce common-mode voltages (CMVs) and then compares its performance with other reduced CMV-PWM (RCMV-PWM) methods. CMVs should be reduced to ensure the electromagnetic compatibility and safety of grid-connected inverters. RCMV-PWM methods attempt to synthesize voltage references without zero vectors, which cause high CMV peaks. In these methods, the peak-to-peak magnitude of CMVs can be reduced by one-third of the conventional space-vector PWM. The introduced method splits every reference vector into two vectors to avoid the use of zero vectors. The performances of the RCMV-PWM methods are analyzed in accordance with the modulation index through simulation and experiment.

• Proceedings of the KIPE Conference
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• 2011.07a
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• pp.442-443
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• 2011

In this paper, a voltage control method based on DQ transformation and Space Vector Pulse Width Modulation (SVPWM) for a single phase three-level converter is proposed. This control method is designed to use DC values instead of using instantaneous values of current which are usually used in single-phase application, so that it results in a fast and robust voltage control response. Simulation results demonstrate the validity of the control strategies.

• Proceedings of the IEEK Conference
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• 2001.06e
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• pp.5-8
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• 2001

In this paper, we have space vector PWM(Pulse Width Modulation) circuits on the FPGA(Field Programmable Gate Arry) chip designed by VHDL(Very high speed integrated circuit Hardware Description Language). This circuit parts was required at controlling the AC servo motor system and should have been designed with many discrete digital logics. In the result of this study, peripheral circuits are to be simple and the designed logic terms are robust and precise. Because of it's easy verification and implementation, we could deduced that the customize FPGA chip show better performance than that of circuit modules parts constituted of discrete IC.