• ETRI Journal
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• v.28 no.5
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• pp.607-614
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• 2006

This paper presents a new class of microstrip slow-wave open-loop resonator filters with reduced size and improved stopband characteristics. A comprehensive treatment of both ends loaded with triangular and rectangular ends is described, leading to the invention of a microstrip slow-wave open-loop resonator. Two-resonator and four-resonator bandpass filters are designed at the operating frequency of about 2 GHz, and a bandwidth of 60 MHz. The size of the slow-wave open-loop resonator is optimized from the standpoint of the unloaded Q-factor. The filters are not only compact in size due to the slow-wave effect, but also have a wider upper stopband resulting from the dispersion effect. The filter designs of this type are described in details. The experimental results are demonstrated and discussed.

• Journal of Welding and Joining
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• v.26 no.5
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• pp.90-96
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• 2008

The objective of this paper is to investigate the effects of the laser power, the material thickness, comer angles, and the loop size on the formation of the comer in the cutting of Inconel 718 super-alloy sheet using high-power CW Nd: YAG laser. In order to investigate the influence of comer angles and loop sizes on the melted area and the formation of comer in the sharp comer, angular cutting tests and loop cutting tests were carried out. The results of the angular cutting tests were shown that the melted area is minimized and the melting mode is changed from nose melting in the thickness direction to the secondary melting induced by the attached dross when the comer angle is $90^{\circ}$. Through the results of loop cutting tests, the variation of the melted area and the comer shape in the sharp comer according to the loop size were examined. In addition, it was shown that a proper loop size is approximately 3 mm. The results of above experiments will be reflected on the knowledge base to generate optimal cutting path of the laser.

• Proceedings of the Korea Electromagnetic Engineering Society Conference
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• 2005.11a
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• pp.245-248
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• 2005

In this paper, small sized half-wavelength circular loop antenna which attached beneath a visor of helmet is designed and fabricated at the resonant frequency of 449MHz. To reduce the size of the antenna, double series-shorted stubs are inserted inside the loop for practical use of a vacant space of loop inside. Also, It is designed for the printed type to install the helmet easily. The size of antenna on helmet is reduced to 87.75%(diameter : 70mm, height :.36mm) compare with general type antenna(diameter : 200mm height 101mm). The return loss, -10dB bandwidth and gain are -13.2dB, 17.6MHz(3.9%), and -1.78dBd. And, radiation pattern is omni-directional pattern at H-plane. Therefore, it can be seen that the half-wavelength circular loop antenna using double series-shorted stubs is proper structure for the miniaturization and the installed antenna of the helmet.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.12 no.1
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• pp.1-6
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• 2019

An extremely small size multi-loop phase-locked loop(PLL) keeping phase noise performances has been proposed. It has been designed to have the loop filter made of small single capacitor with multiple Frequency Voltage Converters (FVCs) because the main goal is to make the size of the proposed PLL extremely small. Multiple FVCs which are connected to voltage controlled oscillator(VCO) make multiple negative feedback loops in PLL. Those multiple negative feedback loops enable the PLL with the loop filter made of an extremely small size single capacitor operate stably. It has been designed with a 1.8V $0.18{\mu}m$ CMOS process. The simulation results show that the proposed PLL has the 1.6ps jitter and $10{\mu}s$ locking time.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.14 no.6
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• pp.479-486
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• 2021

In this paper, an ultra small phase locked loop (PLL) with a single capacitor loop filter has been proposed by adding a signal sensing circuit (SSC). In order to extremely reduce the size of the PLL, the passive element loop filter, which occupies the largest area, is designed with a very small single capacitor (2pF). The proposed PLL is designed to operate stably by the output of the internal negative feedback loop including the SSC acting as a negative feedback to the output of the single capacitor loop filter of the external negative feedback loop. The SSC that detects the PLL output signal change reduces the excess phase shift of the PLL output frequency by adjusting the capacitance charge of the loop filter. Although the proposed structure has a capacitor that is 1/78 smaller than that of the existing structure, the jitter size differs by about 10%. The PLL is designed using a 1.8V 180nm CMOS process and the Spice simulation results show that it works stably.

• Journal of the Korea Institute of Military Science and Technology
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• v.15 no.4
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• pp.450-457
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• 2012

In this paper, we designed low phase noise frequency synthesizer with compact size for High frequency band (Ku-band). The paper addresses merits and demerits of single loop and dual loop frequency synthesizer. The phase noise characteristics of the phase-locked loop frequency synthesizer were predicted based on the analysis for phase noise contribution of noise sources. The proposed model in this paper more accurately predicts the low phase noise frequency synthesizer with compact size for high frequency band.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.14 no.10
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• pp.1104-1111
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• 2003

The paper presents an algorithm for the compensation of gain and phase imbalances to exist between I-phase and Q-phase signal at direct conversion receiver. We propose a gain and phase imbalances blind equalization compensation algorithm by using variable step-size adaptive loop at direct conversion receiver. The blind equalization schemes have trade-off between convergence speed and jitter effect for the compensation of gain and phase imbalance. We propose the variable step-size adaptive loop method, which varies the loop coefficients according to errors, for recovering these problem. By using variable step-size adaptive loops, we propose to speed up the convergence process and reduce the jitter effect and simulation results show that the algorithm compensates signal loss and speeds up convergence time.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.13 no.2
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• pp.123-128
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• 2020

A low phase noise phase locked loop (PLL) with negative feedback loop including frequency variation sensing circuit (FVSC) has been proposed. The FVSC senses the frequency variation of voltage controlled oscillator output signal and controls the volume of electric charge in loop filter capacitance. As the output frequency of the phase locked loop increases, the FVSC reduces the loop filter capacitor charge. This causes the loop filter output voltage to decrease, resulting in a phase locked loop output frequency decrease. The added negative feedback loop improves the phase noise characteristics of the proposed phase locked loop. The size of capacitance used in FVSC is much smaller than that of loop filter capacitance resulting in no effect in the size of the proposed PLL. The proposed low phase noise PLL with FVSC is designed with a supply voltage of 1.8V in a 0.18㎛ CMOS process. Simulation results show the jitter of 273fs and the locking time of 1.5㎲.

• The korean journal of orthodontics
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• v.25 no.3 s.50
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• pp.263-271
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• 1995

The purpose of this study nab to evlauate and compare the effect of the variable factors of wire on the elastic properties of looped rectangular wire. Five variable factors were presented-material(Hi-T, blue Elgiloy), wire size(.016'$\;\times\;$.022', .018'$\;\times\;$.025'), loop length(15mm, 20mm), loop configuration(open loop, closed loop), gabling (non-gable, gable). So, the total 256 specimens were divided into 32 groups, and each of those nab pulled on Instron testing machine. The load-deflection curve of each wire obtained, from which force, range in elastic limit, and stiffness were computed and analyzed statistically. The results were obtained as follows : 1. All of the variable factors - wire material, size, loop length loop configuration, and gabling - took a significant effect on load-deflection rate of looped wire. 2. The force at elastic limit was the smallest in the group of Hi-T, .016'$\;\times\;$.022', 20mm loop length, open loop, non-gable, and the largest in the group of blue Elgiloy, .018'$\;\times\;$.025', 15mm loop length, closed loop, non-gable. 3. The range at elastic limit was the smallest in the group of Hi-T, .018'$\;\times\;$.025', 15mm loop length, open loop, non-gable, and the largest in the group of HI-T, .016'$\;\times\;$.022', 20mm loop length, closed loop, gable. 4. Loop configuration and loop length were the most effective factors on the elastic properties of looped wires, and gabling was the least effective.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.21 no.6
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• pp.1567-1575
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• 1996

This paper presents a new power control method for compensating the short term fading of the reverse link channel in the CDMA mobile telephone system. The fixed step closed loop power control which is now adopted in IS-95, is very simple in structure. However, the step size in the closed loop power control is too big for the channel with a small variation or too big for the channel with a small variation or too small for the channel with a large variation. The method presented in this paper has a simple structure and shows a new model employing the combination of the fixed step size method and variable step size method which results in compensatingthe disadvantages mentioned above. This paper also evaluates the performance inthe fundamental channel model.