• Title/Summary/Keyword: Size Layer

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Study on Performance and Durability of the Proton Exchange Membrane Fuel Cell with Different Micro Porous Layer Penetration Thickness (미세다공층의 침투깊이가 다른 기체확산층이 고분자전해질 연료전지의 성능과 내구성에 미치는 영향에 관한 연구)

  • Cho, Junhyun;Park, Jaeman;Oh, Hwanyeong;Min, Kyoungdoug;Jyoung, Jy-Young;Lee, Eunsook
    • 한국신재생에너지학회:학술대회논문집
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    • 2011.11a
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    • pp.81.2-81.2
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    • 2011
  • The gas diffusion layer (GDL) consists of two main parts, the GDL backing layer, called as a substrate and the micro porous layer (MPL) coated on the GDBL. In this process, carbon particles of MPL penetrates to the GDBL consequently forms MPL penetration part. In this study, the micro porous layer (MPL) penetration thickness is determined as a design parameter of the GDL which affect pore size distribution profile through the GDL inducing different mass transfer characteristics. The pore size distribution and water permeability characteristics of the GDL are investigated and the cell performance is evaluated under fully/low humidification conditions. Transient response and voltage instability are also studied. In addition, to determine the effects of MPL penetration on the degradation, the carbon corrosion stress test is conducted. The GDL that have deep MPL penetration thickness shows better performance in high current density region because of enhanced water management, however, loss of penetrated MPL parts is shown after aging and it induces worse water management characteristics.

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Simulation of Effects of the Size of Embedded Rock Layer under Earth Fill on Seepage Problems of Sea-dike (방조제 바닥사석층의 규모가 제체 침투문제에 미치는 영향에 대한 모의 분석)

  • Lee Haeng Woo;Chang Pyoung Wuck;Song Chang Seob;Won Jeong Yun
    • Journal of The Korean Society of Agricultural Engineers
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    • v.48 no.1
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    • pp.81-88
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    • 2006
  • Numerical analyses were carried out for studying on seepage problems due to seawater intrusion through the embedded rock layers of the sea-dike. A seepage analysis model, SAMTLE was developed fur two-layer embankment system. The analyses by SAMTLE showed that the size of embedded rock layer had a significant effect on the seepage problems of sea-dike. If the embedded rock layer is longer and thicker, the seepage problems become more serious to water head, seepage rate and safety factor of piping in embankment. On the other hand, if the width of embedded rock layer is equivalent to the sea-dike's bottom width, the water head becomes lower and seepage rate and safety factor of piping are dramatically increasing. This makes another seepage problems such that the fresh water becomes saltier and higher seepage rates result in internal erosion of sea-dike.

Preparation and Characteristics of Polyethersulfone Microfiltration Membranes (폴리에테르술폰 정밀여과막의 제조 및 특성 연구)

  • Kim, No-Won
    • Membrane Journal
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    • v.17 no.4
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    • pp.329-337
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    • 2007
  • This is the research about a new method to make the internal separation layer with smallest pore size in polyethersulfone (PES) membrane by adding p-toluenesulfonic acid (TSA) and polyvinylpyrolidone (PVP) to polymeric PES solution. The preparation and morphological characterization of PES sheet membranes containing PVP as a hydrophilic swelling material and TSA as a demixing material were performed. As a result by microflow porometery, the PVP and TSA added PES membranes showed good permeabilities and narrow pore size distributions, comparable to those of the commercial membranes. The concentration of PVP affected the PES characteristics on air permeability and surface structure. The concentration of TSA influenced on pore size distribution but do not affect air permeability. The surface images of FE-SEM shows similar pore size when TSA added or not. However, the cross-section images of FE-SEM show that the TSA added PES membranes have a increase of internal layer thickness with smallest pore size.

Microstructure and Mechanical Properties of Hardmaterials

  • Hayashi, Koji
    • Proceedings of the Korean Powder Metallurgy Institute Conference
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    • 1994.04c
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    • pp.6-6
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    • 1994
  • Har dmaterials such as cemented carbides with or without coated layer, cermets, ceramics and diamond or c-BN high pressure sintered compact are used for cutting tools, wear -resistant parts, rock drilling bits and/or high pressure vessels. These hardmaterials contain not only hard phase, but also second consituent as the element for forming ductile phase and/or sintering aid, and the mechanical properties of each material depend on (1) the amount of the second constituent as well as (2) the grain size of the hard phase. The hardness of each material mainly depends on these two factors. The fracture strength, however, largely depends on other microstructur a1 factors as well as the above two factors. For all hardmaterials, the fracture strength is consider ably affected by (3) the size of microstructur a1 defect which acts as the fracture source. In cemented carbides, the following factors which are generated mainly due to the addition of the second constituent are also important; (4) the variation of the carbon content in the normal phase region free from V-phase and graphite phase, (5) the precipitation of $Co_3$ during heating at about $800^{\circ}C$,(6) the domain size of binder phase, and (7) the formation of ${\beta}$-free layer or Co-rich layer near the surface of sintered compacts. For cemented carbides coated with thin hard substance, the important factors are as follows; (8) the kind of coated substance, (9) the formation of ${\eta}$-phase layer at the interface between coated layer and substrate, (10) the type of residual stress (tension or compression) in the coated layer which depends on the kind of coating method (CVD or PVD), and (11) the properties of the substrate, and (12) the combination, coherency and periodicity of multi-layers. In the lecture, the details of these factors and their effect on the strength will be explained.

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Compact CNN Accelerator Chip Design with Optimized MAC And Pooling Layers (MAC과 Pooling Layer을 최적화시킨 소형 CNN 가속기 칩)

  • Son, Hyun-Wook;Lee, Dong-Yeong;Kim, HyungWon
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.25 no.9
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    • pp.1158-1165
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    • 2021
  • This paper proposes a CNN accelerator which is optimized Pooling layer operation incorporated in Multiplication And Accumulation(MAC) to reduce the memory size. For optimizing memory and data path circuit, the quantized 8bit integer weights are used instead of 32bit floating-point weights for pre-training of MNIST data set. To reduce chip area, the proposed CNN model is reduced by a convolutional layer, a 4*4 Max Pooling, and two fully connected layers. And all the operations use specific MAC with approximation adders and multipliers. 94% of internal memory size reduction is achieved by simultaneously performing the convolution and the pooling operation in the proposed architecture. The proposed accelerator chip is designed by using TSMC65nmGP CMOS process. That has about half size of our previous paper, 0.8*0.9 = 0.72mm2. The presented CNN accelerator chip achieves 94% accuracy and 77us inference time per an MNIST image.

A study on the exchange anisotropy of Ni-Fe/Co-Fe/Mn-Ir/Cu/buffer/Si multialyers (Ni-Fe/Co-Fe/Mn-Ir/Cu/buffer/Si 다층박막의 교환이방성에 관한 연구)

  • 윤성용;노재철;전동민;임흥순;서수정
    • Journal of the Korean Crystal Growth and Crystal Technology
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    • v.10 no.1
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    • pp.36-41
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    • 2000
  • We studied the exchange anisotropy of Ni-Fe/Co-Fe/Mn-Ir/Cu/buffer/Si multilayers using D.C magnetron sputtering technique. Generally, Ni-Fe/Mn-Ir/buffer(Cu)/Si multilayers cannot pin the ferromagnetic layer for the lower exchange biased field. We got $H_{ex}$ ex/ increased by two times, after using Cu/Ta as buffer layer to get larger grain size of Mn-Ir layer and inserting very thin Co-Fe layer between the Ni-Fe layer and the Mn-Ir layer to get improved grain-to-grain epitaxy relation at the interface between Ni-Fe layer and Mn-Ir layer. The variation of $H_{ex}$ by thickness of Mn-Ir layer in ferromagnete/Mn-Ir/buffer/Si multilayers is different to that in Mn-Ir/ferromagnete/buffer/Si multilayers, because the volume distribution of grain size of Mn-Ir layer and the exchange energy at the interface between the Mn-Ir and the ferromagnetic layers is different for stacking sequence.

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Influence of Incorporated Impurities on the Evolution of Microstructure in Electro-Deposited Copper Layer (혼입불순물이 구리 도금층의 미세조직변화에 미치는 영향)

  • Koo, Seok-Bon;Jeon, Jun-Mi;Lee, Chang-Myeon;Hur, Jin-Young;Lee, Hong-Kee
    • Journal of the Korean institute of surface engineering
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    • v.51 no.4
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    • pp.191-196
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    • 2018
  • The self-annealing which leads evolution of microstructure in copper electroplating layers at room temperature occurs after forming deposition layer. During the process, crystal orientation, size and sheet resistance of plating layer change. Lastly, it causes the change of physical and mechanical characteristics such as a tensile strength of plating layer. In this study, the variation of incorporated impurities, microstructure and sheet resistance of copper plating layer formed by electroplating are measured with and without inorganic additives during the self-annealing. In case of absence of inorganic additives, the copper layer presents strong total intensity of incorporated impurities. During the self-annealing, such width of reduction was significant. Moreover, microstructure and crystal size are increased while the tensile strength is decreased noticeably. On the other hand, in the presence of inorganic additives, there is no observable distinction in the copper plating layer. According to the observation on movements of the incorporated impurities in electrodeposition copper layer, within 12 hours the impurities are continuously shifted from inside of the plating layer to its surface after as-deposited electroplating. Within 24 hours, except for the small portion of surface layer, it is considered that most of the microstructure is transformed.

Effect of Particle Size Distribution of Glass Frit on the Transparency of Transparent Dielectric Layer for Plasma Display Panel

  • Park, Ji-Su;Han, Sun-Mi;Hwang, Jong-Hee;Lim, Tae-Young;Kim, Kwang-Jin;Masaki, Takaki
    • 한국정보디스플레이학회:학술대회논문집
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    • 2004.08a
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    • pp.555-557
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    • 2004
  • We report the effect of the particle size (D50) and PSD (Particle Size Distribution) of glass frit on the transparency of transparent dielectric layer of PDP. The milling efficiency of wet milling with water was the best among the dry milling, wet milling with IPA and wet milling with water. The transparency increased with the reduction of particle size of glass frit as the milling time increased. Also the transparency changed by the PSD of glass frit. Glass frits of broad PSD showed high transparency compared with the glass frits of sharp PSD.

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The effect of sintering temperature on the electrical properties of ZnO ceramics (ZnO세라믹스의 소결온도가 전기적 특성에 미치는 영향)

  • 김용혁;이덕출
    • Electrical & Electronic Materials
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    • v.8 no.1
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    • pp.40-47
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    • 1995
  • Electrical properties of ZnO ceramics based on Bi oxide was investigated in relation to sintering temperature. In the temperature range >$1150^{\circ}C$ to >$1350^{\circ}C$ the grain size increased from 9.mu.m to 20.mu.m when the sintering temperature was raised. The leakage current in the low voltage range increased as the potential barrier decreases, which is caused by increasing the grain size at high temperature. The dielectric characteristics of the ZnO ceramics was also affected by sintering temperature. Large dielectric constant was attributed, to the grainboundary layer of polycrystalline ZnO ceramics and decreasing grainboundary width. The variation of breakdown voltage with sintering temperature was attributed to the change of the donor concentration in the ZnO grain and grain size. The results showed that breakdown voltage increased decreasing grain size and donor concentration. Nonohmic coefficient was associated with the lower breakdown voltage per grainboundary layer due to the grain growth and higher donor concentration.

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An Efficient Cache Management Scheme of Flash Translation Layer for Large Size Flash Memory Drives

  • Choi, Hwan-Pil;Kim, Yong-Seok
    • Journal of the Korea Society of Computer and Information
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    • v.20 no.11
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    • pp.31-38
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    • 2015
  • Nowadays, large size flash memory drives with more than a couple of hundreds of gigabytes are common. This paper presents an efficient cache management scheme of flash translation layer, called TPC-FTL, for large size flash memory drives. Since flash drives of large size usually contain large size RAM, we can enhance the performance of page mapping cache by using more RAM for the cache. But if the size exceeds a threshold, the existing schemes are impractical for real devices, because the time for cache manipulation becomes too long. TPC-FTL manages the cache in translation page unit, not in logical page number unit used in existing schemes. Since a translation page covers a large number of logical page numbers (for example, 512 for 2KB size page), the number of cache elements can be reduced up to a practical level. A performance evaluation shows that average response time, an important performance measure, is better than existing schemes via the effect of utilizing spacial locality in addition to temporal locality.