• Title/Summary/Keyword: Single-phase PWM inverters

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PWM Control Techniques for Single-Phase Multilevel Inverter Based Controlled DC Cells

  • Sayed, Mahmoud A.;Ahmed, Mahrous;Elsheikh, Maha G.;Orabi, Mohamed
    • Journal of Power Electronics
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    • v.16 no.2
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    • pp.498-511
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    • 2016
  • This paper presents a single-phase five-level inverter controlled by two novel pulse width modulation (PWM) switching techniques. The proposed PWM techniques are designed based on minimum switching power loss and minimum total harmonic distortion (THD). In a single-phase five-level inverter employing six switches, the first proposed PWM technique requires four switches to operate at switching frequency and two other switches to operate at line frequency. The second proposed PWM technique requires only two switches to operate at switching frequency and the rest of the switches to operate at line frequency. Compared with conventional PWM techniques for single-phase five-level inverters, the proposed PWM techniques offer high efficiency and low harmonic components in the output voltage. The validity of the proposed PWM switching techniques in controlling single-phase five-level inverters to regulate load voltage is verified experimentally using a 100 V, 500 W laboratory prototype controlled by dspace 1103.

Filter Design for Utility Interactive Inverters using Single-Phase Half-Bridge Topology (단상하프브릿지 구조를 갖는 계통연계형 인버터의 필터인덕터 설계)

  • Kim, Hyo-Sung
    • The Transactions of the Korean Institute of Power Electronics
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    • v.12 no.5
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    • pp.364-371
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    • 2007
  • This paper deals with filter design for utility-interactive voltage-sourced PWM inverters built by single-phase half-bridge topology. By analyzing the relation between utility voltage and the ac output voltage of single-phase half-bridge inverters, the instantaneous voltage applied on the filter inductor is deduced qualitatively and quantitatively. Moreover, switching ripple current through the filter inductor is calculated from the filter inductor voltage. Based on the above mentioned analysis, filter design method is proposed by evaluating the percentage of the switching ripple current against the rated fundamental current. Proposed filter design method is verified by simulation and experiment.

Filter Design for Utility Interactive Inverters using Single-phase Full-bridge Topology (단상풀브릿지 구조를 갖는 계통연계형 인버터의 필터인덕터 설계)

  • Kim, Hyo-Sung
    • The Transactions of the Korean Institute of Power Electronics
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    • v.12 no.4
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    • pp.346-353
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    • 2007
  • This paper deals with filter design for utility-interactive voltage-sourced PWM inverters built by single-phase full-bridge topology By analyzing the relation between utility voltage and the ac output voltage of single-phase half-bridge inverters, the instantaneous voltage applied on the filter inductor is deduced qualitatively and quantitatively. Moreover, switching ripple current through the filter inductor is calculated from the filter inductor voltage. Based on the above mentioned analysis, filter design method is proposed by evaluating the percentage of the switching ripple current against the rated fundamental current. Proposed filter design method is verified by simulation and experiment.

Wavelet PWM Technique for Single-Phase Three-Level Inverters

  • Zheng, Chun-Fang;Zhang, Bo;Qiu, Dong-Yuan;Zhang, Xiao-Hui;Xiao, Le-Ming
    • Journal of Power Electronics
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    • v.15 no.6
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    • pp.1517-1523
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    • 2015
  • The wavelet PWM (WPWM) technique has been applied in two-level inverters successfully, but directly applying the WPWM technique to three-level inverters is impossible. This paper proposes a WPWM technique suitable for a single-phase three-level inverter. The work analyzes the control strategy with the WPWM and obtains the design of its parameters. Compared with the SPWM technique for a single-phase three-level inverter under the same conditions, the WPWM can obtain high magnitudes of the output fundamental frequency component, low total harmonic distortion, and simpler digital implementation. The feasibility experiment is given to verify of the proposed WPWM technique.

Filter Design for Grid-Connected Single-Phase Inverters

  • Kim, Hyo-Sung
    • Journal of Power Electronics
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    • v.9 no.4
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    • pp.623-630
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    • 2009
  • This paper proposes a filter design guideline for grid-connected single-phase inverters. By analyzing the instantaneous voltage applied to the filter inductor, the switching ripple current through the filter inductor can be precisely calculated. Therefore, filter inductance can be designed accurately, which guaranties that the switching ripple current will be under the target value. The proposed filter design method is verified by experiment.

Variable Speed Drive of Permenant Split­Capacitor Single Phase Induction Motor Using SHE PWM Inverters (SHE PWM 인버터를 이용한 영구 콘덴서형 단상 유도전동기의 가변속 구동)

  • 이수원;전칠환
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.7 no.8
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    • pp.1751-1758
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    • 2003
  • This paper describes speed control of a permanent split capacitor single phase induction motor using SHE PWM inverters. The inverter is controlled by V55 microprocessor and its range is larger than other systems. Due to the V/F control with SHE(Selected Harmonic Elimination) PWM, continuously variable speed is attained and THD(Total Harmonic Distortion) is decreased. This is verified by simulations and experimental results.

Compensation of Effects of DC-Link Ripple Voltages on Output Voltage of Two-Leg Three-Phase PWM Inverters (2-레그 3상 PWM 인버터의 출력전압에서 직류링크 리플전압의 영향 보상)

  • Kim Young-Sin;Lee Dong-Choon;Seok Jul-Ki
    • The Transactions of the Korean Institute of Electrical Engineers B
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    • v.55 no.1
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    • pp.47-53
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    • 2006
  • In this paper, a simple scheme compensating for the effect of dc-link ripple voltages on output voltage of two-leg and three-phase PWM inverters is proposed, where single-phase half-bridge PWM convertor and two-leg inverter are used. The voltage at neutral point of the dc-link is controlled so that the upper-half of do-link voltage is equal to the lower-half voltage in average concept. However, the effect of the do-link ripple voltage results in the inverter output voltage and current distortion. This effect can be eliminated by introducing a compensation voltage in switching time calculation. Also, the inverter dead time should be compensated for sinusoidal output waveform. The proposed scheme has been verified by experimental results which were obtained from the V/F constant operation of the induction motor fed by two-leg inverter.

Phase Current Reconstruction Techniques for Two-Phase Inverters using a Single Current Sensor

  • Cho, Young-Hoon;Cho, Kwan-Yuhl;Mok, Hyung-Soo;Kim, Kyeong-Hwa;Lai, Jih-Shen
    • Journal of Power Electronics
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    • v.11 no.6
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    • pp.837-845
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    • 2011
  • This paper proposes phase current reconstruction techniques for two-phase two-leg and two-phase four-leg inverters using a single current sensor. In the proposed methods, one phase current is sampled simultaneously with a particular branch current by using only one current sensor, and then current reconstruction algorithms are applied to extract the information on two phase currents from the sensor output. The sampled current information is periodically updated at the peak and the valley of the triangular carrier waveform in each switching cycle of pulse-width modulation (PWM). The voltage vector spaces where the phase currents can be reconstructed are evaluated. Compared to the existing method using two individual current sensors in two phases, the proposed schemes can save implementation cost since it is possible to remove one current sensor. In addition, the proposed methods are free from gain discrepancy issues between two current sensors. Simulations and experiments show excellent current reconstruction performance of the proposed methods.

Novel Single-State PWM Technique for Common-Mode Voltage Elimination in Multilevel Inverters

  • Nguyen, Nho-Van;Quach, Hai-Thanh;Lee, Hong-Hee
    • Journal of Power Electronics
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    • v.12 no.4
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    • pp.548-558
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    • 2012
  • In this paper, a novel offset-based single-state pulse width modulation (PWM) method for achieving zero common-mode voltage (CMV) and reducing switching losses in multilevel inverters is presented. The specific active switching state of the zero common-mode (ZCM) voltage that approximates the reference voltage can be deduced from the switching state sequence of the reduced CMV phase disposition PWM (CMV PD PWM) method. From the reference leg voltages for the zero common-mode voltage, an N-to-2-level transformation defines a virtual two-level inverter and the corresponding nominal leg voltage references. The commutation process of the reduced CMV PD PWM method in a multilevel inverter and its outputs can be simply followed in a nominal switching time diagram for the virtual inverter. The characteristics of the reduced CMV PD PWM and the single-state PWM for zero common-mode voltage are analyzed in detail in this paper. The theoretical analysis of the proposed PWM method is verified by experimental results.

Steady-State Performance Improvement of Single-Phase PWM Inverters Using PLL Technique (PLL 기법을 이용한 단상 PWM 인버터의 정상상태 성능개선)

  • 정세교;이대식
    • The Transactions of the Korean Institute of Power Electronics
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    • v.9 no.4
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    • pp.356-363
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    • 2004
  • This paper presents a precision voltage control technique of a single phase PWM inverter for a constant voltage and constant frequency(CVCF) applications. The proposed control scheme employs an additional phase-locked loop(PLL) compensator which is constructed using the output capacitor voltage and current. The computer simulation and experiment are carried out for the actual single-phase PWM inverter and it is well demonstrated from these results that the steady-state performance and total harmonic distortion(THD) are remarkably improved by employing the proposed technique.