• 제목/요약/키워드: Single Board Computer Navigation

검색결과 10건 처리시간 0.025초

바닥 특징점을 사용하는 실내용 정밀 고속 자율 주행 로봇을 위한 싱글보드 컴퓨터 솔루션 (An Embedded Solution for Fast Navigation and Precise Positioning of Indoor Mobile Robots by Floor Features)

  • 김용년;서일홍
    • 로봇학회논문지
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    • 제14권4호
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    • pp.293-300
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    • 2019
  • In this paper, an Embedded solution for fast navigation and precise positioning of mobile robots by floor features is introduced. Most of navigation systems tend to require high-performance computing unit and high quality sensor data. They can produce high accuracy navigation systems but have limited application due to their high cost. The introduced navigation system is designed to be a low cost solution for a wide range of applications such as toys, mobile service robots and education. The key design idea of the system is a simple localization approach using line features of the floor and delayed localization strategy using topological map. It differs from typical navigation approaches which usually use Simultaneous Localization and Mapping (SLAM) technique with high latency localization. This navigation system is implemented on single board Raspberry Pi B+ computer which has 1.4 GHz processor and Redone mobile robot which has maximum speed of 1.1 m/s.

단일보드컴퓨터 구조해석을 통한 집적회로 균열현상의 구조적 개선 (Structural Improvement for Crack of Integrated Circuit in Single Board Computer by Structure Analysis)

  • 류정민;이용준;손권일
    • 한국항행학회논문지
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    • 제23권5호
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    • pp.460-465
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    • 2019
  • 본 연구에서는 항법정보 산출용 컴퓨터에 탑재되는 단일보드컴퓨터를 대상으로 야전 운용간 발생한 전기적 고장현상에 대하여 구조해석 관점에서 해소방안을 도출하고자 하였다. 특성요인도 분석을 통해 단일보드컴퓨터의 구조적인 문제로 중앙처리장치 기판에 크랙이 발생한 것을 확인할 수 있었고, 크랙발생 부위에 가해진 물리적인 영향으로 인해 통신기능 수행이 불가해지면서 동시에 부팅이 불가한 현상이 나타난 것으로 확인되었다. 이에 대하여 크랙현상을 유발시키는 과도응력의 위치를 찾고자 구조해석을 수행하였다. 구조해석을 통해 응력집중현상이 발생하는 부위를 확인할 수 있었고, 이를 해소시키기 위해 과도응력의 원인이 되는 부품과 구조물을 변경하는 개선방안을 수립하였다. 개선방안에 대한 검증은 구조해석을 통해 개선 전과 후의 구조물에 작용하는 응력분포를 비교하여 응력의 감소정도를 보였다. 추가적으로, 열 해석을 통해 부품 및 구조물 변경으로 인한 방열기능 유지여부를 확인하였고, 개선방안을 적용한 실 장비의 방열판 온도를 측정함으로써 실제 장비의 방열 영향성을 확인하였다.

비행 전구간 유도제어 HILS 기법을 적용한 구동제어 알고리즘 성능 평가 연구 (Performance Evaluation for Several Control Algorithms of the Actuating System Using G/C HILS Technique)

  • 전완수;조현진;이만형
    • 한국정밀공학회지
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    • 제13권9호
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    • pp.114-129
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    • 1996
  • This paper describes the whole development phase for the underwater vehicle actuating system with high hydroload torque disturbance. This includes requirement analysis, system modeling, control algorithm design, real time implementation, test and performance evaluations. As for driving control algorithms, fuzzy logic, variable structure and PD(Proportional-Differential) algorithm were designed and implemented on board controller using a single chip microprocessor. Intel 8797. And test and performance evaluation is carried out both single test and wystem integration test. We could confirm the basic performance of actuating system through the single test and gereral developing work of any actuating systems was finished with a single performance test of actuating system without system integration test. But, we suggested that system integration test be needed. System integration test is carried out using G/C HILS(Guidance and Control Hardware-In-the -Loop Simulation) which is constituted flight motion simulator, load simulator, real time host computer and the related subsystems such as inertial navigation system, power supply system and Guidance and Control Computer etc.. The most important practical contribution of this paper is that full system characteristics such as minimal control effort, enhancement of guidance and autopilot performance by the actuating system using G/C HILS technique are investigated. Through full running G/C HILS, in spite of the passing to single tests, some control algorithm resulted in failure as to stability of full system and system time frame.

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Inverted RTK system and its applications in Japan

  • Kanzaki, Masayuki
    • 한국항해항만학회:학술대회논문집
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    • 한국항해항만학회 2006년도 International Symposium on GPS/GNSS Vol.1
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    • pp.455-458
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    • 2006
  • The Real Time Kinematic (RTK) technique is the most productive and accurate GPS positioning method today, as it can be determinate position within few centimeters instantly. This method is widely used for applications such as surveying, structure monitoring and machine guidance etc. In order to perform RTK processing for large scale systems (i.e. precise vehicle monitoring with many rovers), many expensive RTK receivers and same number of bidirectional communication units have to be installed to collect observation data communicate with the reference site and monitor its RTK solutions. Moreover, if applications require remote control or apply sensing instruments, we have to install computers at each rover. To limit expense and complexity of system management with a large number of rovers, we have developed server based RTK processing platform to share RTK function for all rovers. The system can be process many GPS stations with a single personal computer. we have also developed a specialized dual frequency GPS receiver unit without on-board RTK processing capability to reduce receiver cost in order to demonstrate the advantage of our server based RTK platform. This paper describes the concept of our server based RTK platform and specialized GPS receiver unit with existing applications in Japan.

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Single-axis Hardware in the Loop Experiment Verification of ADCS for Low Earth Orbit Cube-Satellite

  • Choi, Minkyu;Jang, Jooyoung;Yu, Sunkyoung;Kim, O-Jong;Shim, Hanjoon;Kee, Changdon
    • Journal of Positioning, Navigation, and Timing
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    • 제6권4호
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    • pp.195-203
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    • 2017
  • A 2U cube satellite called SNUGLITE has been developed by GNSS Research Laboratory in Seoul National University. Its main mission is to perform actual operation by mounting dual-frequency global positioning system (GPS) receivers. Its scientific mission aims to observe space environments and collect data. It is essential for a cube satellite to control an Earth-oriented attitude for reliable and successful data transmission and reception. To this end, an attitude estimation and control algorithm, Attitude Determination and Control System (ADCS), has been implemented in the on-board computer (OBC) processor in real time. In this paper, the Extended Kalman Filter (EKF) was employed as the attitude estimation algorithm. For the attitude control technique, the Linear Quadratic Gaussian (LQG) was utilized. The algorithm was verified through the processor in the loop simulation (PILS) procedure. To validate the ADCS algorithm in the ground, the experimental verification via a single axis Hardware-in-the-loop simulation (HILS) was used due to the simplicity and cost effectiveness, rather than using the 3-axis HILS verification (Schwartz et al. 2003) with complex air-bearing mechanism design and high cost.

A Narrowband Interference Excision Algorithm in the Frequency Domain for GNSS Receivers

  • Shin, Mi-Young;Park, Chan-Sik;Lee, Ho-Keun;Lee, Dae-Yearl;Hwang, Dong-Hwan;Lee, Sang-Jeong
    • 한국항해항만학회:학술대회논문집
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    • 한국항해항만학회 2006년도 International Symposium on GPS/GNSS Vol.2
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    • pp.359-364
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    • 2006
  • Interference can seriously degrade the performance of GPS receiver because GPS signal has extremely low power at earth surface. This paper presents a Narrowband Interference Excision Filter (NIEF) in frequency domain that removes narrowband interferences with small signal loss. A NIEF transforms the received GPS signals with interferences into the frequency domain with FFT and then compute statistics such as mean and standard deviation to determine an excision threshold. All spectrums exceeding the threshold are removed and the remaining spectrums are restored by IFFT. A NIEF effectively can remove various and strong interferences with a simple structure. However, the signal power loss is unavoidable during FFT and IFFT. Besides the hamming window and overlap technique, a threshold-whitening technique and an adaptive detection threshold are adopted to effectively reduce the signal power loss. The performance of implemented NIEF is evaluated using real signals obtained by 12 bit GPS signal acquisition board. The output of NIEF is fed into the Software Defined Receiver to evaluate the acquisition and tracking performance. Experimental results shows that many types of interference such as single-tone CWI, AM, FM, swept CWI and multi-tones CWI are effectively mitigated with small signal power loss.

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Development of Image-based Assistant Algorithm for Vehicle Positioning by Detecting Road Facilities

  • Jung, Jinwoo;Kwon, Jay Hyoun;Lee, Yong
    • 한국측량학회지
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    • 제35권5호
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    • pp.339-348
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    • 2017
  • Due to recent improvements in computer processing speed and image processing technology, researches are being actively carried out to combine information from a camera with existing GNSS (Global Navigation Satellite System) and dead reckoning. In this study, the mathematical model based on SPR (Single Photo Resection) is derived for image-based assistant algorithm for vehicle positioning. Simulation test is performed to analyze factors affecting SPR. In addition, GNSS/on-board vehicle sensor/image based positioning algorithm is developed by combining image-based positioning algorithm with existing positioning algorithm. The performance of the integrated algorithm is evaluated by the actual driving test and landmark's position data, which is required to perform SPR, based on simulation. The precision of the horizontal position error is 1.79m in the case of the existing positioning algorithm, and that of the integrated positioning algorithm is 0.12m at the points where SPR is performed. In future research, it is necessary to develop an optimized algorithm based on the actual landmark's position data.

SDR을 이용한 ILS 항행신호 수신 시스템 설계 (Receiving System Design of ILS Navigation Signal Using SDR)

  • 김민성;강지혜;구경헌;이경순
    • 한국항행학회논문지
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    • 제28권3호
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    • pp.254-261
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    • 2024
  • 항공기 이착륙 시 정확한 유도는 중요하며, 이를 위해 계기착륙시스템 ILS (instrument landing system) 가 이용된다. 안정된 ILS 운용을 위하여 정기 점검이 진행되며, 지상차량 및 측정항공기 외 드론을 이용한 점검 수행 연구가 있다. 광대역 주파수 수신용 SDR과 단일보드컴퓨터를 이용하고, GNU Radio를 통해 ILS의 로컬라이저 신호를 수신 처리하는 소형시스템을 설계하였다. GNU Radio를 통한 신호처리 특성을 실행하고 MATLAB Simulink로 시뮬레이션 및 이론 값을 확인하는 과정을 거쳤다. 이를 통해 항공기가 활주로 진입할 때 DDM (difference in depth of modulation)과 진입 각도를 계산할 수 있다. 또한 GNU Radio에서 TCP (transmission control protocol)를 통해 무선으로 실시간 신호를 처리할 수 있게 구현하였다. 이를 활용해 항공기가 활주로 중심선으로 진입할 때는 약 0.5%, 1도 각도로 진입할 때는 0.27% 이내 오차가 있는 결과를 얻었다. 항공기 또는 지상 차량 이용 ILS 신호 검사 및 유지보수 방식과 비교하여 차별성이 있는 드론 이용 검사에 장착 가능한 소형 SDR 사용 수신시스템 구현을 가능하게 할 것이라 예상한다.

Hardware Approach to Fuzzy Inference―ASIC and RISC―

  • Watanabe, Hiroyuki
    • 한국지능시스템학회:학술대회논문집
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    • 한국퍼지및지능시스템학회 1993년도 Fifth International Fuzzy Systems Association World Congress 93
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    • pp.975-976
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    • 1993
  • This talk presents the overview of the author's research and development activities on fuzzy inference hardware. We involved it with two distinct approaches. The first approach is to use application specific integrated circuits (ASIC) technology. The fuzzy inference method is directly implemented in silicon. The second approach, which is in its preliminary stage, is to use more conventional microprocessor architecture. Here, we use a quantitative technique used by designer of reduced instruction set computer (RISC) to modify an architecture of a microprocessor. In the ASIC approach, we implemented the most widely used fuzzy inference mechanism directly on silicon. The mechanism is beaded on a max-min compositional rule of inference, and Mandami's method of fuzzy implication. The two VLSI fuzzy inference chips are designed, fabricated, and fully tested. Both used a full-custom CMOS technology. The second and more claborate chip was designed at the University of North Carolina(U C) in cooperation with MCNC. Both VLSI chips had muliple datapaths for rule digital fuzzy inference chips had multiple datapaths for rule evaluation, and they executed multiple fuzzy if-then rules in parallel. The AT & T chip is the first digital fuzzy inference chip in the world. It ran with a 20 MHz clock cycle and achieved an approximately 80.000 Fuzzy Logical inferences Per Second (FLIPS). It stored and executed 16 fuzzy if-then rules. Since it was designed as a proof of concept prototype chip, it had minimal amount of peripheral logic for system integration. UNC/MCNC chip consists of 688,131 transistors of which 476,160 are used for RAM memory. It ran with a 10 MHz clock cycle. The chip has a 3-staged pipeline and initiates a computation of new inference every 64 cycle. This chip achieved an approximately 160,000 FLIPS. The new architecture have the following important improvements from the AT & T chip: Programmable rule set memory (RAM). On-chip fuzzification operation by a table lookup method. On-chip defuzzification operation by a centroid method. Reconfigurable architecture for processing two rule formats. RAM/datapath redundancy for higher yield It can store and execute 51 if-then rule of the following format: IF A and B and C and D Then Do E, and Then Do F. With this format, the chip takes four inputs and produces two outputs. By software reconfiguration, it can store and execute 102 if-then rules of the following simpler format using the same datapath: IF A and B Then Do E. With this format the chip takes two inputs and produces one outputs. We have built two VME-bus board systems based on this chip for Oak Ridge National Laboratory (ORNL). The board is now installed in a robot at ORNL. Researchers uses this board for experiment in autonomous robot navigation. The Fuzzy Logic system board places the Fuzzy chip into a VMEbus environment. High level C language functions hide the operational details of the board from the applications programme . The programmer treats rule memories and fuzzification function memories as local structures passed as parameters to the C functions. ASIC fuzzy inference hardware is extremely fast, but they are limited in generality. Many aspects of the design are limited or fixed. We have proposed to designing a are limited or fixed. We have proposed to designing a fuzzy information processor as an application specific processor using a quantitative approach. The quantitative approach was developed by RISC designers. In effect, we are interested in evaluating the effectiveness of a specialized RISC processor for fuzzy information processing. As the first step, we measured the possible speed-up of a fuzzy inference program based on if-then rules by an introduction of specialized instructions, i.e., min and max instructions. The minimum and maximum operations are heavily used in fuzzy logic applications as fuzzy intersection and union. We performed measurements using a MIPS R3000 as a base micropro essor. The initial result is encouraging. We can achieve as high as a 2.5 increase in inference speed if the R3000 had min and max instructions. Also, they are useful for speeding up other fuzzy operations such as bounded product and bounded sum. The embedded processor's main task is to control some device or process. It usually runs a single or a embedded processer to create an embedded processor for fuzzy control is very effective. Table I shows the measured speed of the inference by a MIPS R3000 microprocessor, a fictitious MIPS R3000 microprocessor with min and max instructions, and a UNC/MCNC ASIC fuzzy inference chip. The software that used on microprocessors is a simulator of the ASIC chip. The first row is the computation time in seconds of 6000 inferences using 51 rules where each fuzzy set is represented by an array of 64 elements. The second row is the time required to perform a single inference. The last row is the fuzzy logical inferences per second (FLIPS) measured for ach device. There is a large gap in run time between the ASIC and software approaches even if we resort to a specialized fuzzy microprocessor. As for design time and cost, these two approaches represent two extremes. An ASIC approach is extremely expensive. It is, therefore, an important research topic to design a specialized computing architecture for fuzzy applications that falls between these two extremes both in run time and design time/cost. TABLEI INFERENCE TIME BY 51 RULES {{{{Time }}{{MIPS R3000 }}{{ASIC }}{{Regular }}{{With min/mix }}{{6000 inference 1 inference FLIPS }}{{125s 20.8ms 48 }}{{49s 8.2ms 122 }}{{0.0038s 6.4㎲ 156,250 }} }}

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Radar Target Extractor에 의한 선박운동정보의 추출에 관한 연구 (Extraction of the ship movement information by a radar target extractor)

  • 이대재;김광식;변덕수
    • 수산해양기술연구
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    • 제38권3호
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    • pp.249-255
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    • 2002
  • 소형 레이더 신호를 정량적으로 분석하여 해상물표의 운동정보를 실시간으로 추출 및 표시하기 위한 radar target extractor(RTX)를 개발하고, 이 장치를 소형 레이더 장치에 부착시켜 소형 연근해 어선에서도 타선의 진운동정보나 충돌회피정보와 같은 각종의 항해정보를 활용토록 하기 위한 연구를 수행하였다. 본 연구에서 개발한 RTX는 IBM PC 의 ISA bus를 통해 데이터를 입출력할 수 있도록 설계된 신호처리장치로서, 일반 선박용 레이더에서 출력되는 video signal, trigger, antenna bearing pulse, antenna heading mark를 직접 입력할 수 있도록 하였다. 이 장치는 레이더 펄스신호가 해상에 존재하는 물표로부터 반사되어 수신될 때, 그 물표의 신호정보 및 위치좌표정보를 PC 의 CPU 에 의해 처리하지 않고 RTX 자체에 내장된 전용 DSP를 이용하여 실시간으로 처리하도록 하였다. 이 장치에 서 video 신호는 analog devices 사의 AD9042 (12 bit, 40 MHZ monolithic A/D converter)를 이용하여 digital 신호로 변환되고, 그 화상 신호는 CRT에 PPI 방식으로 표시되었다. 이 때 안테나가 회전하면서 탐지한 레이더 물표의 echo 신호는 echo 신호의 강도가 증가하면서 다른 물표의 위치와 구별되면 하나의 물표로서 판정한다. 이 경우, 표적식별 알고리즘은 물표가 미리 설정한 물표포착영역(target acquiring zone)내에 있고, 해당 물표의 크기와 다른 물표와의 거리등에 대한 데이터가 식별기준을 만족하는가에 대한 처리를 수행하도록 개발되었다. 본 연구는 현재 소형어선에 탑재되고 있는 소형레이더의 성능 향상에 크게 기여할 것으로 판단되고, 또한 소형어선용 저가형 ARPA 시스템의 국산화에 필요한 기반기술을 제공할 수 있을 것으로 판단된다.