• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2008년도 하계학술대회 논문집 Vol.9
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• pp.37-37
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• 2008

Hydrogenated nanocrystalline Si (nc-Si:H) thin films were prepared by plasma enhanced chemical vapor deposition (PECVD). The films were deposited with a radio frequency power of 100 W, while substrates were exposed to direct current (DC) biases in the range from 0 to -400 V. The effects of the DC bias on the formation of nanoscale Si crystallites in the films and on their optical characteristics were investigated. The size of the Si crystallites in the films ranges from ~ 1.9 to ~ 4.1 nm. The relative fraction of the crystallites in the films reached up ~ 56.5 % when the DC bias of -400 V was applied. Based on the variation in the structural, chemical, and optical features of the films with DC bias voltages, a model for the formation of nanostructures of the nc-Si:H films prepared by PECVD was suggested. This model can be utilized to understand the evolution in the size and relative fraction of the nanocrystallites as well as the amorphous matrix in the nc-Si:H films.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2008년도 하계학술대회 논문집 Vol.9
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• pp.134-135
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• 2008

Ultra-thin $SiO_2/ZrO_2$ dielectrics were deposited by atomic layer chemical vapor deposition (ALCVD) method for non-volatile memory application. Metal-oxide-semiconductor (MOS) capacitors were fabricated by stacking ultra-thin $SiO_2$ and $ZrO_2$ dielectrics. It is found that the tunneling current through the stacked dielectric at the high voltage is lager than that through the conventional silicon oxide barrier. On the other hand, the tunneling leakage current at low voltages is suppressed. Therefore, the use of ultra-thin $SiO_2/ZrO_2$ dielectrics as a tunneling barrier is promising for the future high integrated non-volatile memory.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1998년도 하계학술대회 논문집 G
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• pp.2515-2517
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• 1998

The micro fresnel lens(MFL) was modeled and fabricated on a XY-stage electrostatically driven by comb actuator. The modeled MFL was approximated as a step shape with 4-phase and 4-zone plate. The focal length and diameter of the MFL is 20mm and 912${\mu}m$, respectively. The XY-stage suspending the MFL is designed to generate a large static displacement up to about 20${\mu}m$. On SOI substrates, we first fabricated MFL using the RIE(reactive Ion etching) technology and then patterned and etched bulk silicon to make XY-stage. After the fabrication of all structures on top side of the SOI substrates. $Si_3N_4$ was deposited for passivation of all structures using PECVD(plasma enhanced chemical vapor deposition). All the MFL systems width comb drive actuator were released by KOH etching from the bottom side of the SOI wafer using double-sided alignment technique. In fabrication of MFL, a dry etching conditions is established in order to improve surface roughness and to control the etched depth.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2000년도 하계학술대회 논문집 C
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• pp.1763-1765
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• 2000

This paper presents deposition and characterizations of microcrystalline silicon ($\mu$ c-Si:H) films prepared by hot wire chemical vapor deposition at substrate temperature at 300$^{\circ}C$. The flow rates of $SiH_4$ gas are critical parameter for the formation of Si films with microcrystalline phase. We could obtain $\mu$ c-Si:H with columnar grain structure and volume fraction of 75% without H2 dilution. The electronic properties, hydrogen bonding configurations, and $H_2$ concentration inside the films are also strongly affected by $SiH_4$ flow rate, which is provided in this paper.

• 한국재료학회지
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• 제6권6호
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• pp.589-604
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• 1996

화학증착기에 의한 실리콘막의 증착에서 증착기의 기초 진공도는 잔류가스로부터 실리콘 막내로 유입되는 oxygen, carbon과 같은 분순물의 양을 결정하며, 따라서 증착 거동 및 막의 결정성에 영향을 줄 수 있는 공정 변수이다. 본 연구에서는 고진공 화학증착기를 이용하여 기초 진공도는 비정질 실리콘의 증착과 결정화에 미치는 영향을 조사하였다. 높은 기초 진공도는 비정질/결정질 천이 증착온도의 감소를 가져왔다. 또한 비정질 실리콘막의 결정화 속도 및 박막 결정성을 향상시키는 것으로 조사되었다. 이와 같은 기초 진공도의 영향은 증착시 잔류가스에 함유되는 O, C과 같은 불순물의 영향으로 설명될 수 있었다. 기초 진공도에 따른 실리콘 막의 결정성 향상은 다결정 실리콘 박막 트렌지스터의 구동 특성을 향상시키는 것으로 조사되었다. 기초 진공도가 10-3Torr에서 10-5Torr 로 증가함에 따라 전자 이동도는 17$\textrm{cm}^2$/V.s에서 25$\textrm{cm}^2$/V.s로 증가하였으며 누설전류는 감소하였다.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2000년도 하계학술대회 논문집
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• pp.735-738
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• 2000

This paper shows experimentally that oxide layer on the p-type Si-substrate can grow at low temperature(500$^{\circ}C$∼600$^{\circ}C$) using high pressure water vapor system. As the result of experiment, oxide layer growth rate is about 0.19${\AA}$/min at 500$^{\circ}C$, 0.43${\AA}$/min at 550$^{\circ}C$, 1.2${\AA}$/min at 600$^{\circ}C$ respectively. So, we know oxide layer growth follows reaction-controlled mechanism in given temperature range. Consequently, granting that oxide layer growth rate increases linearly to temperature over 600$^{\circ}C$, we can expect oxide growth rate is 5.2${\AA}$/min at 1000$^{\circ}C$. High pressure oxidation of silicon is particularly attractive for the thick oxidation of power MOSFET, because thermal oxide layers can grow at relatively low temperature in run times comparable to typical high-temperature, 1 atm conditions. For higher-temperature, high-pressure oxidation, the oxidation time is reduced significantly

• 한국전기전자재료학회논문지
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• 제15권4호
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• pp.367-372
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• 2002

The vertically well-aligned carbon nanotubes(CNTs) were successfully grown on Ni coated silicon wafer substrate by DC bias-assisted PECVD(Plasma Enhanced Chemical Vapor Deposition). As a catalyst, Ni thin film of thickness ranging from 15~30nm was prepared by electron beam evaporator method. In order to find the optimum growth condition, the type of gas mixture such as $C_2H_2-NH_3$ was systematically investigated by adjusting the gas mixing ratio at $570^{\circ}C$ under 0.4Torr. The diameter of the grown CNTs was 40~200nm and the diameter of the CNTs increased with increasing the Ni particles size. TEM images clearly showed carbon nanotubes to be multiwalled. The measured turn-on field was $3.9V/\mu\textrm{m}$ and an emission current of $1.4{\times}10^4A/\textrm{cm}^2$ was $7V/\mu\textrm{m}$. The CNTs grown by bias-assisted PECVD was able to demonstrate high quality in terms of vertical alignment, crystallization of graphite and the processing technique at low temperature of $570^{\circ}C$ and this can be applied for the emitter tip of FEDs.

• KIEE International Transactions on Electrophysics and Applications
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• 제4C권3호
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• pp.111-116
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• 2004

The Ni/SiC Schottky diode was fabricated with the $\alpha$-SiC thin film grown by the ICP-CVD method on a (111) Si wafer. $\alpha$-SiC film has been grown on a carbonized Si layer in which the Si surface was chemically converted to a very thin SiC layer achieved using an ICP-CVD method at $700^{\circ}C$. To reduce defects between the Si and $\alpha$-SiC, the surface of the Si wafer was slightly carbonized. The film characteristics of $\alpha$-SiC were investigated by employing TEM (Transmission Electron Microscopy) and FT-IR (Fourier Transform Infrared Spectroscopy). Sputterd Ni thin film was used as the anode metal. The boundary status of the Ni/SiC contact was investigated by AES (Auger Electron Spectroscopy) as a function of the annealing temperature. It is shown that the ohmic contact could be acquired beyond a 100$0^{\circ}C$ annealing temperature. The forward voltage drop at 100A/cm was I.0V. The breakdown voltage of the Ni/$\alpha$-SiC Schottky diode was 545 V, which is five times larger than the ideal breakdown voltage of the silicon device. As well, the dependence of barrier height on temperature was observed. The barrier height from C- V characteristics was higher than those from I-V.

• Transactions on Electrical and Electronic Materials
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• 제1권2호
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• pp.12-17
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• 2000

Helicon waves were excited by a Nagoya type III antenna in magnetized plasma, and hydrogen and methane are fed through a Mass Flow Controller(MFC). We made a diagnosis of properties of helicon plasma by H$_2$gaseous discharge, and fabricated the diamond thin film. The maximum measured electron density was 1${\times}$10$\^$10/ cm$\^$-3/. Diamond films have been growo on (100) silicon substrate using the helicon plasma chemical vapor deposition. Diamond films were deposited at a pressure of 0.1 Torr, deposition time of 40~80 h, a substrate temperature of 700$^{\circ}C$ and methane concentrations of 0.5~2.5%. The growth characteristics were investigated by means of X-ray Photoelectron (XPS) and X-ray Diffraction(XRD), XRD and XPS analysis revealed that SiC was formed, and finally diamond particles were definitely deposited on it. With increasing deposition time, the thickness and crystallization of the daimond thin film increased, For this system the optimum condition of methane concentration was estimated to near to 1.5%.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2001년도 추계학술대회 논문집
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• pp.533-536
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• 2001

Single crystal cubic silicon carbide(3C-SiC) thin film were deposited on Si(100) substrate up to a thickness of 4.3 $\mu\textrm{m}$ by APCVD(atmospheric pressure chemical vapor deposition) method using hexamethyildisilane(HMDS) at 1350$^{\circ}C$. The HMDS flow rate was 0.5 sccm and the carrier gas flow rate was 2.5 slm. The HMDS flow rate was important to get a mirror-like. The growth rate of the 3C-SiC films was 4.3 $\mu\textrm{m}$/hr. The 3C-SiC epitaxical layers on Si(100) were characterized by XRD(X-ray diffraction), raman scattering and RHEED(reflection high-energy electron diffraction), respectively The 3C-SiC distinct phonons of TO(transverse optical) near 796 cm$\^$-1/ and LO(longitudinal optical) near 974${\pm}$1 cm$\^$-1/ were recorded by raman scattering measurement. The deposition films were identified as the single crystal 3C-SiC phase by XRD spectra(2$\theta$=41.5$^{\circ}$). Also, with increase of films thickness, RHEED patterns gradually changed from a spot pattern to a streak pattern