• Proceedings of the Korean Vacuum Society Conference
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• 2016.02a
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• pp.308-309
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• 2016

Reducing surface recombination is a critical factor for high efficiency silicon solar cells. The passivation process is for reducing dangling bonds which are carrier. Tunnel oxide layer is one of main issues to achieve a good passivation between silicon wafer and emitter layer. Many research use wet-chemical oxidation or thermally grown which the highest conversion efficiencies have been reported so far. In this study, we deposit ultra-thin tunnel oxide layer by PECVD (Plasma Enhanced Chemical Vapor Deposition) using $N_2O$ plasma. Both side deposit tunnel oxide layer in different RF-power and phosphorus doped a-Si:H layer. After deposit, samples are annealed at $850^{\circ}C$ for 1 hour in $N_2$ gas atmosphere. After annealing, samples are measured lifetime and implied Voc (iVoc) by QSSPC (Quasi-Steady-State Photo Conductance). After measure, samples are annealed at $400^{\circ}C$ for 30 minute in $Ar/H_2$ gas atmosphere and then measure again lifetime and implied VOC. The lifetime is increase after all process also implied VOC. The highest results are lifetime $762{\mu}s$, implied Voc 733 mV at RF-power 200 W. The results of C-V measurement shows that Dit is increase when RF-power increase. Using this optimized tunnel oxide layer is attributed to increase iVoc. As a consequence, the cell efficiency is increased such as tunnel mechanism based solar cell application.

• Proceedings of the Korean Vacuum Society Conference
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• 2014.02a
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• pp.454-454
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• 2014

Silicon microwire array is one of the promising platforms as a means for developing highly efficient solar cells thanks to the enhanced light trapping efficiency. Among the various fabrication methods of microstructures, deep reactive ion etching (DRIE) process has been extensively used in fabrication of high aspect ratio microwire arrays. In this presentation, we show precisely controlled Si microwire arrays by tuning the DRIE process conditions. A periodic microdisk arrays were patterned on 4-inch Si wafer (p-type, $1{\sim}10{\Omega}cm$) using photolithography. After developing the pattern, 150-nm-thick Al was deposited and lifted-off to leave Al microdisk arrays on the starting Si wafer. Periodic Al microdisk arrays (diameter of $2{\mu}m$ and periodic distance of $2{\mu}m$) were used as an etch mask. A DRIE process (Tegal 200) is used for anisotropic deep silicon etching at room temperature. During the process, $SF_6$ and $C_4F_8$ gases were used for the etching and surface passivation, respectively. The length and shape of microwire arrays were controlled by etching time and $SF_6/C_4F_8$ ratio. By adjusting $SF_6/C_4F_8$ gas ratio, the shape of Si microwire can be controlled, resulting in the formation of tapered or vertical microwires. After DRIE process, the residual polymer and etching damage on the surface of the microwires were removed using piranha solution ($H_2SO_4:H_2O_2=4:1$) followed by thermal oxidation ($900^{\circ}C$, 40 min). The oxide layer formed through the thermal oxidation was etched by diluted hydrofluoric acid (1 wt% HF). The surface morphology of a Si microwire arrays was characterized by field-emission scanning electron microscopy (FE-SEM, Hitachi S-4800). Optical reflection measurements were performed over 300~1100 nm wavelengths using a UV-Vis/NIR spectrophotometer (Cary 5000, Agilent) in which a 60 mm integrating sphere (Labsphere) is equipped to account for total light (diffuse and specular) reflected from the samples. The total reflection by the microwire arrays sample was reduced from 20 % to 10 % of the incident light over the visible region when the length of the microwire was increased from $10{\mu}m$ to $30{\mu}m$.

• Proceedings of the Korean Vacuum Society Conference
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• 2016.02a
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• pp.406-406
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• 2016

To get high efficiency n-type crystalline silicon solar cells, passivation is one of the key factor. Tunnel oxide (SiO2) reduce surface recombination as a passivation layer and it does not constrict the majority carrier flow. In this work, the passivation quality enhanced by different chemical solution such as HNO3, H2SO4:H2O2 and DI-water to make thin tunnel oxide layer on n-type crystalline silicon wafer and changes of characteristics by subsequent annealing process and firing process after phosphorus doped amorphous silicon (a-Si:H) deposition. The tunneling of carrier through oxide layer is checked through I-V measurement when the voltage is from -1 V to 1 V and interface state density also be calculated about $1{\times}1012cm-2eV-1$ using MIS (Metal-Insulator-Semiconductor) structure . Tunnel oxide produced by 68 wt% HNO3 for 5 min on $100^{\circ}C$, H2SO4:H2O2 for 5 min on $100^{\circ}C$ and DI-water for 60 min on $95^{\circ}C$. The oxide layer is measured thickness about 1.4~2.2 nm by spectral ellipsometry (SE) and properties as passivation layer by QSSPC (Quasi-Steady-state Photo Conductance). Tunnel oxide layer is capped with phosphorus doped amorphous silicon on both sides and additional annealing process improve lifetime from $3.25{\mu}s$ to $397{\mu}s$ and implied Voc from 544 mV to 690 mV after P-doped a-Si deposition, respectively. It will be expected that amorphous silicon is changed to poly silicon phase. Furthermore, lifetime and implied Voc were recovered by forming gas annealing (FGA) after firing process from $192{\mu}s$ to $786{\mu}s$. It is shown that the tunnel oxide layer is thermally stable.

• Transactions of the Korean Society of Mechanical Engineers B
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• v.36 no.11
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• pp.1135-1140
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• 2012

Two-step metallization processes have been proposed to achieve high-efficiency silicon solar cells, where the front-side grids are formed by silver plating after the formation of a nickel seed layer with a mask. Because the conventional mask patterning process is performed by an expensive selective printing method using either UV resist or phase change ink, however, the combination of a simple coating and laser-selective ablation processes is proposed in this study as an alternative means. As a masking material, the solar cell wafer was coated with either inexpensive wax having a low melting temperature or a fluorocarbon solution, and then, an electrode image was patterned by selectively removing the masking material using the laser. It was found that the fluorocarbon coating was not only superior to the wax coating in terms of pattern uniformity but it also increased the efficiency of the solar cell by 0.16%, as confirmed by statistical f and t tests.

• Journal of the Korean Vacuum Society
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• v.21 no.6
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• pp.301-311
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• 2012

Discharge property of plasma jet devices is investigated for the application to the doping processes of crystalline solar cells and others. Current-voltage characteristics are shown as the typical normal-glow discharge in the various gas pressure of plasma jets, such as in the atmospheric plasma jets of Ar-discharge, in the ambient pressure of atmospheric discharge, and in the ambient Ar-pressure of Ar-discharge. The discharge voltage of atmospheric plasma jet is required as low as about 2.5 kV while the operation voltage of low pressure below 200 Torr is low as about 1 kV in the discharge of atmospheric and Ar plasma jets. With a single channel plasma jet, the irradiated plasma current on the doped silicon wafer is obtained high as the range of 10~50 mA. The temperature increasement of wafer is normally about $200^{\circ}C$. In the result of silicon wafers doped by phosphoric acid with irradiating the plasma jets, the doping profiles of phosphorus atoms shows the possibility of plasma jet doping on solar cells.

• Proceedings of the Korean Vacuum Society Conference
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• 2012.08a
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• pp.193-193
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• 2012

In thin film silicon solar cells, p-i-n structure is adopted instead of p/n junction structure as in wafer-based Si solar cells. PECVD is the most widely used thin film deposition process for a-Si:H or ${\mu}c$-Si:H solar cells. Single-chamber PECVD system for a-Si:H solar cell manufacturing has the advantage of lower initial investment and maintenance cost for the equipment. However, in single-chamber PECVD system, doped and intrinsic layers are deposited in one plasma chamber, which inevitably impedes sharp dopant profiles at the interfaces due to the contamination from previous deposition process. The cross-contamination between layers is a serious drawback of single-chamber PECVD system. In this study, a new plasma process to solve the cross-contamination problem in a single-chamber PECVD system was suggested. In order to remove the deposited B inside of the plasma chamber during p-layer deposition, a high RF power was applied right after p-layer deposition with SiH4 gas off, which is then followed by i-layer, n-layer, and Ag top-electrode deposition without vacuum break. In addition to the p-i interface control, various interface control techniques such as FTO-glass pre-annealing in O2 environment to further reduce sheet resistance of FTO-glass, thin layer of TiO2 deposition to prevent H2 plasma reduction of FTO layer, and hydrogen plasma treatment prior to n-layer deposition, etc. were developed. The best initial solar cell efficiency using single-chamber PECVD system of 10.5% for test cell area of 0.2 $cm^2$ could be achieved by adopting various interface control methods.

• 한국신재생에너지학회:학술대회논문집
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• 2009.11a
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• pp.366-366
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• 2009

후면접합 태양전지는 상용 태양전지의 수평전류 손실(lateral current loss) 이 없으며, 전면전극에 의해 발생하는 그림자 손실(shading loss) 줄인 고효율 태양전지의 하나이다. 생성된 반송자가 후면에 위치한 전극에서 수집되기 때문에 효율향상을 위해서는 불순물에 의한 재결합을 줄이는 것이 중요하다. 따라서 Gettering 은 높은 소수반송자 수명(life-time)을 가지는 고품위 실리콘 기판은 고효율 실리콘태양전지 제작을 위한 중요 요소 기술이다. 본 연구에서는 n-type c-Si 기판을 이용한 고효율 실리콘 이종접합 태양전지제작을 위해 external gettering 공정을 이용하여 고품위 실리콘 기판을 제작하였다. POC13 doping process 의 온도, 시간을 변화시킴으로써 이에 따른 변화를 관찰하였다. 주사전자현미경(SEM)를 통해 etch pit 을 확인 했으며,Four point probe 를 통해 면저항을 측정, 인(P)의 농도를 계산 하였다. 계산된 면저항을 통해 인(P)의 확산 깊이를 계산하였다. Iodine passivation 된 시편을 Qusi-steady state photoconductance (QSSPC)를 이용하여 소수반송자 수명을 측정함으로써 gettering 에 의한 bulk lifetime 향상 효과를 관찰하였다.

• 한국신재생에너지학회:학술대회논문집
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• 2009.06a
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• pp.95-95
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• 2009

실리콘 이종접합 태양전지는 비정질 실리콘을 사용하여 p-n 접합을 만들기 때문에 결정질 태양전지에 비해 개방전압이 높은 특성을 보인다. 그렇지만 결정질 태양전지는 접합을 확산공정으로 만들어 p층과 n층의 계면에서 결함이 존재하지 않는 반면 이종접합 태양전지는 결정질 실리콘 표면에 접합을 만들기 때문에 결정질 실리콘의 표면에 defect이 존재할 가능성이 많아진다. 이번 실험에서 결정질 실리콘의 cleaning 조건 변화에 따른 이종접합 태양전지의 특성변화를 보았다. 실리콘 이종접합 태양전지는 전면전극/ITO/p a-Si:H/i a-Si:H/n c-Si/i a-Si:H/n a-Si:H/후면전극의 구조로 만들으며 p형 및 n형 비정질 실리콘은 PECVD를 이용하여 증착하였고 i형 비정질 실리콘은 HWCVD를 이용하여 증착하였다. 만들어진 태양전지의 특성을 평가하기 위해 암전류 특성, 광전류 특성, 양자효율, 소수반송자수명을 측정하였다.

• 한국신재생에너지학회:학술대회논문집
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• 2011.05a
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• pp.124.1-124.1
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• 2011

결정질 태양전지에서 도핑(Doping)은 반도체(Semiconductor)의 PN 접합(Junction)을 형성하는 중요한 역할을 한다. 도핑은 반도체에 불순물(Dopant)을 주입하는 공정으로 고온에서 진행되며 온도는 중요한 변수(Parameter)로 작용한다. 본 연구에서는 여러 가지 도핑 방법 중 SOD(Spin-On Dopant)를 이용하여 온도에 따른 도핑 결과와 특성을 분석 하였다. P-type 웨이퍼(Wafer)에 SOD를 이용하여 불순물을 증착 후 Hot-plate에서 15분간 Baking 하였다. Baking된 웨이퍼는 노(Furnace)에 넣고 $860^{\circ}C{\sim}880^{\circ}C$까지 $10^{\circ}C$씩 가변하였다. 각각의 조건에 대해 Lifetime과 Sheet Resistance을 측정하였고, 그 결과 $880^{\circ}C$에서의 Lifetime이 $23.58{\mu}s$로 $860^{\circ}C$에 비해 235.8% 증가하여 가장 우수 하였으며, Sheet Resistance 또한 $68{\Omega}$/sq로 $860^{\circ}C$에서 가장 우수하게 측정되었다. SOD의 속도 가변에 따른 특성 변화를 보기 위해 온도는 $880^{\circ}C$에 고정한 후 속도를 3000rpm~4500rpm까지 500rpm간격으로 1시간동안 실험한 결과 rpm 속도에 따른 lifetime 변화는 거의 없었으며, Sheet Resistance는 3000rpm에서 $63{\Omega}$/sq로 가장 우수 하였다. 본 연구를 통해 온도와 Spin rpm에 따른 특성을 확인한 결과 온도가 높을 때 Sheet Resistance가 가장 안정화 되며, lifetime이 더욱 우수한 것을 확인할 수 있었다.

• Proceedings of the KIEE Conference
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• 2009.04b
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• pp.248-250
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• 2009

고효율 태양전지를 위한 결정질 태양전지의 구조 중 UNSW에서 개발한 BCSC(buried contact solar cell)가 있는데, 이는 전면 전극을 laser 처리 후 무전해 니켈 도금으로 형성한 것이다. 이같은 전면 전극을 형성하기 위해서는 무전해 nickel 도금 후 열처리가 필수적이다. 우리는 이 공정을 확립하기 위해 결정질 wafer에 후면을 PECVD로 SiNx막을 형성하여 $30\Omega/\square$로 도핑한 후 후면을 불산으로 제거한 상태에서 양면을 니켈 무전해 도금으로 전극을 형성하여 $300^{\circ}C,\;350^{\circ}C,\;400^{\circ}C$에서 각각 3,6,9분간 진행하였다. 그 결과 $400^{\circ}C$에서 3분간 열처리된 sample이 상대적으로 가장 명확한 IV curve를 형성하였다. 이 실험의 결과는 PN 접합 구조에서 전극을 nickel로 사용할 때 유용하게 사용될 수 있다.