• JSTS:Journal of Semiconductor Technology and Science
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• 제8권3호
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• pp.251-263
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• 2008

In this paper, we report an analytical modeling and 2-D Synopsys Sentaurus TCAD simulation of ion implanted silicon carbide MESFETs. The model has been developed to obtain the threshold voltage, drain-source current, intrinsic parameters such as, gate capacitance, drain-source resistance and transconductance considering different fabrication parameters such as ion dose, ion energy, ion range and annealing effect parameters. The model is useful in determining the ion implantation fabrication parameters from the optimization of the active implanted channel thickness for different ion doses resulting in the desired pinch off voltage needed for high drain current and high breakdown voltage. The drain current of approximately 10 A obtained from the analytical model agrees well with that of the Synopsys Sentaurus TCAD simulation and the breakdown voltage approximately 85 V obtained from the TCAD simulation agrees well with published experimental results. The gate-to-source capacitance and gate-to-drain capacitance, drain-source resistance and trans-conductance were studied to understand the device frequency response. Cut off and maximum frequencies of approximately 10 GHz and 29 GHz respectively were obtained from Sentaurus TCAD and verified by the Smith's chart.

• 한국전기전자재료학회논문지
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• 제20권8호
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• pp.661-665
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• 2007

This paper presents the electrical properties of SiGe HBTs designed with bottom collector and single metal layer structure for RF power amplifier. Base layer was formed with graded-SiGe/Si structures and the collector place to the bottom of the device. Bottom collector and single metal layer structures could significantly simplify the fabrication process. We studied about the influence of SiGe base thickness, number of emitter fingers and temperature dependence $(<200^{\circ}C)$ on electrical properties. The feasible application in $1{\sim}2GHz$ frequency from measured data $BV_{CEO}{\sim}10V,\;f_T{\sim}14GHz,\;{\beta}{\simeq}110,\;NF{\sim}1dB$ using packaged SiGe HBTs. We will discuss the temperature dependent current flow through the e-b, b-c junctions to understand stability and performance of the device.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2007년도 하계학술대회 논문집 Vol.8
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• pp.187-187
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• 2007

This paper presents the electrical properties of SiGe HBTs designed with bottom collector and single metal layer structure for RF power amplifier. Base layer was formed with graded-SiGe/Si structures and the collector place to the bottom of the device. Bottom collector and single metal layer structures could significantly simplify the fabrication process. We studied about the influence of SiGe base thickness, number of emitter fingers and temperature dependence (< $200^{\circ}C$) on electrical properties. The feasible application in 1~2GHz frequency from measured data $BV_{CEO}$ ~10V, $f_r$~14 GHz, ${\beta\simeq}110$, NF~1 dB using packaged SiGe HBTs. We will discuss the temperature dependent current flow through the e-b, b-c junctions to understand stability and performance of the device.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2006년도 추계학술대회 논문집 Vol.19
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• pp.232-232
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• 2006

SiC single crystal Ingots were prepared onto different seed material using sublimation PVT techniques and then their crystal quality was systematically compared. In this study, the conventional SiC seed material and the new SiC seed material with an inserted SiC epitaxial layer on a seed surface were used as a seed for SiC bulk growth. The inserted epitaxial layer was grown by a sublimation epitaxy method called the CST with a low growth rate of $2{\mu}m/h$ N-type 2"-SIC single crystals exhibiting the polytype of 6H-SiC were successfully fabricated and carrier concentration levels of below $10^{17}/cm^3$ were determined from the absorption spectrum and Hall measurements. The slightly higher growth rate and carrier concentration were obtained in SiC single crystal Ingot grown on new SiC Seed materials with the inserted epitaxial layer on the seed surface, maintaining the high quality.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2018년도 추계학술대회
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• pp.159-160
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• 2018

본 논문에서는 인덕션 쿠커의 토폴로지 중 하나인 직렬 공진 하프-브릿지 컨버터에 Wide-Bandgap 전력 반도체를 적용하여 전력 손실을 평가한다. 전력 반도체의 발전으로 Si-기반의 전력반도체를 대체할 GaN과 SiC의 Wide-Bandgap 소자들이 양산되고 있다. Wide-Bandgap 소자의 장점은 고주파수에서의 동작과 낮은 손실에 있다. 이에 인덕션 쿠커의 직렬 공진 하프-브릿지 컨버터에 Wide-Bandgap 전력반도체를 적용하여 전력 손실을 PSIM Thermal Module을 통해 평가하고 인덕션 쿠커에 적합한 소자를 선정한다.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2015년도 제49회 하계 정기학술대회 초록집
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• pp.192.1-192.1
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• 2015

We demonstrated the nonvolatile memory functionality of nano-crystalline silicon (nc-Si) and InGaZnOxide (IGZO) thin film transistors (TFTs) using mobile protons that are generated by very short time hydrogen neutral beam (H-NB) treatment in gate insulator (SiO2). The whole memory fabrication process kept under $50^{\circ}C$ (except SiO2 deposition process; $300^{\circ}C$). These devices exhibited reproducible hysteresis, reversible switching, and nonvolatile memory behaviors in comparison with those of the conventional FET devices. We also executed hydrogen treatment in order to figure out the difference of mobile proton generation between PECVD and H-NB CVD that we modified. Our study will further provide a vision of creating memory functionality and incorporating proton-based storage elements onto a probability of next generation flexible memorable electronics such as low power consumption flexible display panel.

• Journal of electromagnetic engineering and science
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• 제4권3호
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• pp.137-142
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• 2004

In this paper, we present a new current-current negative feedback(CCNF) differential voltage-controlled oscillator (VCO) with 1/f induced low-frequency noise suppressed. By means of the CCNF, the 1/f induced low-frequency noise is removed from the proposed CCNF VCO. Also, high-frequency noise is stopped from being down-converted into phase noise by means of the increased output impedance through the CCNF and the feedback capacitor $C_f. The proposed CCNF VCO represents 11-dB reduction in phase noise at 10 kHz offset, compared with the conventional differential VCO. The phase noise of the proposed CCNF VCO is measured as - 87 dBc/Hz at 10 kHz offset frequency from 5.5-GHz carrier. The proposed CCNF VCO consumes 14.0 mA at 2.0 V supply voltage, and shows single-ended output power of - 12 dBm.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2009년도 추계학술대회 논문집
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• pp.55-55
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• 2009

Silicon Carbide (SiC) is a material with a wide bandgap (3.26eV), a high critical electric field (~2.3MV/cm), a and a high bulk electron mobility (${\sim}900cm^2/Vs$). These electronic properties allow high breakdown voltage, high frequency, and high temperature operation compared to Silicon devices. Although various SiC DMOSFET structures have been reported so far for optimizing performances. the effect of channel dimension on the switching performance of SiC DMOSFETs has not been extensively examined. In this paper, we report the effect of the interface states ($Q_s$) on the transient characteristics of SiC DMOSFETs. The key design parameters for SiC DMOSFETs have been optimized and a physics-based two-dimensional (2-D) mixed device and circuit simulator by Silvaco Inc. has been used to understand the relationship with the switching characteristics. To investigate transient characteristic of the device, mixed-mode simulation has been performed, where the solution of the basic transport equations for the 2-D device structures is directly embedded into the solution procedure for the circuit equations. The result is a low-loss transient characteristic at low $Q_s$. Based on the simulation results, the DMOSFETs exhibit the turn-on time of 10ns at short channel and 9ns at without the interface charges. By reducing $SiO_2/SiC$ interface charge, power losses and switching time also decreases, primarily due to the lowered channel mobilities. As high density interface states can result in increased carrier trapping, or recombination centers or scattering sites. Therefore, the quality of $SiO_2/SiC$ interfaces is important for both static and transient properties of SiC MOSFET devices.

• The Korean Journal of Ceramics
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• 제3권4호
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• pp.257-262
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• 1997

Aluminum nitride(AIN) thin films were deposited on SiO$_2$/Si substrates by reactive sputtering for the application of SAW devices. The major deposition parameters such as pressure, nitrogen fraction, rf power, substrate distance were changed to find out the optimal condition for c-axis oriented thin films on an amorphous substrate. The effects of deposition parameters on the crystal structure, residual stress, and growth morphology of thin films were characterized by XRD, SEM, and TEM. The FWHM of (002) rocking curve of the films deposited at the proper condition was lower than 2.2$^{\circ}$(C=0.93$^{\circ}$). Cross-sectional TEM showed that self-aligned structure was developed just after slightly random growth at the initial stage. The frequency characteristics of test device fabricated from AIN thin films confirmed their piezoelectric property and applicability for SAW devices.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2019년도 추계학술대회
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• pp.82-84
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• 2019

본 논문에서는 Induction Heating(IH) 시스템에서 WBG 소자인 SiC MOSFET과 GaN Transistor의 Performance 비교를 통해서 소자의 적합성을 분석한다. SiC 및 GaN 소자를 직렬 공진형 컨버터로 구성된 IH 시스템에 적용하여 온도, 전압, 전류, Gate 저항 등을 고려한 도통 손실, 스위칭 손실, 역방향 도통 손실과 열 해석 프로그램을 통한 열 성능 등의 비교가 수행되며, 이를 통해 소자 적합성이 분석된다. 각 소자에 따른 IH 시스템에 대한 시뮬레이션을 수행하여, 이론적 손실 비교를 통한 소자 적합성 분석에 대한 타당성을 검증한다.