• ETRI Journal
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• v.11 no.4
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• pp.75-83
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• 1989

The diffusion mechanism of Si in GaAs was investigated using different diffusion sources based on the Si-Ga-As ternary phase equilibria. The Si profiles are measured with secondary ion mass spectrometry and differ significantly for sources taken from the different phase fields in the ternary phase diagram. Neutral As vacancy diffusion is proposed for acceptor Si diffusion anneals using a Ga - Si - GaAs source. Donor Si diffusion using As - rich sources and a Si -GaAs tie line source shows concentration dependent diffusion behavior. Concentration dependent diffusion coefficients of donor Si for As - rich source diffusion were found to be related to net ionized donor concentration and showed three regimes of different behavior: saturation regime, intermediate regime,and intrinsic regime. Ga vacancies are proposed to be responsible for donor Si diffusionin GaAs: $Si_Ga^+V_Ga^-$ (donor Si -acceptor Gavacancy) complex for the extrinsic regime and neutral $V_G$a, for the intrinsic regime.The Si - GaAs tie line source resulted in two branch profiles, intermediate between the As - rich and the Ga - rich source diffusion cases.

• Proceedings of the Korean Vacuum Society Conference
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• 2013.02a
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• pp.420-420
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• 2013

We investigated oxygen plasma effect on defect states near the interface of AlGaN/GaN High Electron Mobility Transistor (HEMT) structure grown on a silicon substrate. After the plasma treatment, electrical properties were evaluated using a frequency dependant Capacitance-Voltage (C-V) and a temperature dependant C-V measurements, and a deep level transient spectroscopy (DLTS) method to study the change of defect densities. In the depth profile resulted from the temperature dependant C-V, a sudden decrease in the carrier concentration for two-dimensional electron gas (2DEG) nearby 250 K was observed. In C-V measurement, the interface states were improved in case of the oxygen-plasma treated samples, whereas the interface was degraded in case of the nitrogen-plasma treated sample. In the DLTS measurement, it was observed the two kinds of defects well known in AlGaN/GaN structure grown on sapphire substrate, which have the activation energies of 0.15 eV, 0.25 eV below the conduction band. We speculate that this defect state in AlGaN/GaN on the silicon substrate is caused from the decrease in 2DEG's carrier concentrations. We compared the various DLTS signals with filling pulse times to identify the characteristics of the newly found defect. In the filling pulse time range under the 80 us, the activation energies changed as the potential barrier model. On the other hand, in the filling pulse time range above the 80 us, the activation energies changed as the extended potential model. Therefore, we suggest that the found defect in the AlGaN/GaN/Si structure could be the extended defect related with AlGa/N/GaN interface states.

• Korean Journal of Materials Research
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• v.23 no.10
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• pp.580-585
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• 2013

To observe the formation of defects at the interface between an oxide semiconductor and $SiO_2$, ZnO was prepared on $SiO_2$ with various oxygen gas flow rates by RF magnetron sputtering deposition. The crystallinity of ZnO depends on the characteristic of the surface of the substrate. The crystallinity of ZnO on a Si wafer increased due to the activation of ionic interactions after an annealing process, whereas that of ZnO on $SiO_2$ changed due to the various types of defects which had formed as a result of the deposition conditions and the annealing process. To observe the chemical shift to understand of defect deformations at the interface between the ZnO and $SiO_2$, the O 1s electron spectra were convoluted into three sub-peaks by a Gaussian fitting. The O 1s electron spectra consisted of three peaks as metal oxygen (at 530.5 eV), $O^{2-}$ ions in an oxygen-deficient region (at 531.66 eV) and OH bonding (at 532.5 eV). In view of the crystallinity from the peak (103) in the XRD pattern, the metal oxygen increased with a decrease in the crystallinity. However, the low FWHM (full width at half maximum) at the (103) plane caused by the high crystallinity depended on the increment of the oxygen vacancies at 531.66 eV due to the generation of $O^{2-}$ ions in the oxygen-deficient region formed by thermal activation energy.

• Korean Journal of Materials Research
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• v.24 no.3
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• pp.135-139
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• 2014

To obtain the transistor with ambipolar transfer characteristics, IGZO/SiOC thin film transistor was prepared on SiOC with various polarities as a gate insulator. The interface between a channel and insulator showed the Ohmic and Schottky contacts in the bias field of -5V ~ +5V. These contact characteristics depended on the polarities of SiOC gate insulators. The transfer characteristics of TFTs were observed the Ohmic contact on SiOC with polarity, but Schottky contact on SiOC with low polarity. The IGZO/SiOC thin film transistor with a Schottky contact in a short range bias electric field exhibited ambipolar transfer characteristics, but that with Ohmic contact in a short range electric field showed unipolar characteristics by the trapping phenomenon due to the trapped ionized defect formation.

• Proceedings of the Korean Vacuum Society Conference
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• 2012.02a
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• pp.314-314
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• 2012

The dilute magnetic semiconductors (DMS) have been developed to multi-functional electro-magnetic devices. Specially, the Si based DMS formed by ion implantation have strong advantages to improve magnetic properties because of the controllable effects of carrier concentration on ferromagnetism. In this study, we investigated the deep level states of Fe- and Co-ions implanted Si wafer during rapid thermal annealing (RTA) process. The p-type Si (100) wafers with hole concentration of $1{\times}10^{16}cm^{-3}$ were uniformly implanted by Fe and Co ions at a dose of $1{\times}10^{16}cm^{-2}$ with an energy of 60 keV. After RTA process at temperature ranges of $500{\sim}900^{\circ}C$ for 5 min in nitrogen ambient, the Au electrodes with thickness of 100 nm were deposited to fabricate a Schottky contact by thermal evaporator. The surface morphology, the crystal structure, and the defect state for Fe- and Co- ion implanted p-type Si wafers were investigated by an atomic force microscopy, a x-ray diffraction, and a deep level transient spectroscopy, respectively. Finally, we will discuss the physical relationship between the electrical properties and the variation of defect states for Fe- and Co-ions implanted Si wafer after RTA.

• Proceedings of the Korean Vacuum Society Conference
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• 2016.02a
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• pp.299-299
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• 2016

SiC는 넓은 에너지갭 (Eg=~3.4 eV)을 갖는 반도체로써, 고전압, 고온에서 동작이 가능하여 기존의 Si기반의 파워디바이스를 대체하기 위한 물질로 많은 연구가 이루어지고 있다. 파워 디바이스의 성능 향상을 위해서는 기판과 절연체 사이의 계면에 생성되는 계면 결함을 감소시켜야 한다. 따라서 본 연구에서는 SiC 기판에 high-k 물질인 HfO2를 증착하여 HfO2/SiC 계면에 유도된 결함을 분석하고 이를 감소시킬 수 있는 방법에 대한 연구를 수행하였다. HfO2 박막은 atomic-layer-deposition (ALD) 방법을 이용하여 SiC 기판 위에 $200^{\circ}C$에서 증착하였다. HfO2 박막 증착 후 NH3 분위기에서 rapid thermal annealing 방법을 이용하여 $600^{\circ}C$에서 1분 동안 열처리 진행하였다. Current-voltage (I-V) 측정을 통해 열처리 전 HfO2/SiC의 절연파괴 전압이 약 8.3 V 임을 확인하였다. NH3 열처리 후 HfO2/SiC의 절연파괴 전압이 10 V로 증가하였으며 누설 전류가 크게 감소하는 것을 확인하였다. 또한 capacitance-voltage (C-V) 측정을 통해 열처리 후 flat band voltage가 negative 방향에서 positive 방향으로 이동함을 확인하였고, 이를 통해 NH3 열처리 방법이 HfO2/SiC 계면에 존재하는 결함을 감소시킬 수 있음을 확인하였다. 전자 구조상의 conduction band edge에 존재하는 결함 준위를 분석하기 위해 x-ray absorption spectroscopy (XAS) 분석을 실시하였고, 열처리 전 HfO2/SiC 계면에 많은 결함 준위가 존재함을 확인하였으며, x-ray photoelectron spectroscopy (XPS) 분석을 통해 이 결함 준위가 oxygen deficiency state과 관련됨을 알 수 있었다. NH3 열처리 후 결과와 비교해보면, oxygen deficiency state가 감소함을 확인하였으며 이로 인해 conduction band edge에 존재하는 결함 준위가 감소함을 알 수 있었다. 따라서, NH3 열처리 방법을 이용하여 HfO2/SiC 계면에 존재하는 결함을 감소시킬 수 있으며, HfO2/SiC의 물리적, 전기적 특성을 향상시킬 수 있다는 결과를 도출하였다.

• Proceedings of the Korean Vacuum Society Conference
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• 2000.02a
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• pp.67-67
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• 2000

CeO2는 cubic 구조의 일종인 CaR2 구조를 가지고 있으며 격자상수가 Si의 격장상수와 매우 비슷하여 Si 기판위에 에피텍셜하게 성장할 수 있는 가능성이 매우 크다. 따라서 SOI(silicon-on-insulator)구조의 실현을 위하여 Si 기판위에 CeO2 박막을 에피텍셜하게 성장시키려는 많은 노력이 있어왔다. 또한 metal-ferroelectric-semiconductor field effect transistor)에서 ferroelectric 박막과 Si 기판사이의 완충층으로 사용된다. 이러한 CeO2의 응용을 위해서는 Si 기판 위에 성장된 CeO2 박막의 방위성 및 CeO2/Si 구조의 전기적 특성을 알아보는 것이 매우 중요하다. 본 연구에서는 Si(100) 기판위에 CeO2(200)방향으로 성장하는 박막과 EcO2(111) 방향으로 성장하는 박막을 rf magnetron sputtering 방법으로 증착하여 각각의 구조적, 전기적 특성을 분석하였다. RCA 방법으로 세정한 P-type Si(100)기판위에 Ce target과 O2를 사용하여 CeO2(200) 및 CeO2(111)박막을 증착하였다. 증착후 RTA(rapid thermal annealing)방법으로 95$0^{\circ}C$, O2 분위기에서 5분간 열처리를 하였다 이렇게 제작된 CeO2 박막의 구조적 특성을 XRD(x-ray diffraction)방법으로 분석하였고, Al/CeO2/Si의 MIS(metal-insulator-semiconductor)구조를 제작하여 C-V (capacitance-voltage), I-V (current-voltage) 특성을 분석하였으며 TEM(transmission electron microscopy)으로 증착된 CeO2막과 Si 기판과의 계면 특성을 연구하였다. C-V특성에 있어서 CeO2(111)/Si은 CeO2(111)의 두께가 증가함에 따라 hysteresis windows가 증가한 방면 CeO2(200)/Si은 hysteresis windows가 아주 작을뿐만 아니라 CeO2(200)의 두께가 증가하더라도 hysteresis windos가 증가하지 않았다. CeO2(111)/Si과 CeO2(200)/Si의 C-V 특성의 차이는 CeO2(111)과 CeO2(200)이 Si 기판에 의해 받은 stress의 차이와 이에 따른 defect형성의 차이에 의한 것으로 사료된다.

• Journal of IKEEE
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• v.28 no.1
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• pp.104-109
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• 2024

In this research, we explored the influence of post-annealing atmospheres on the electrical properties of Ga₂O₃/SiC heterojunction diodes. We fabricated Ga₂O₃/SiC heterojunction diodes by RF sputtering and after the fabrication the post-annealing in various gas atmospheres was performed. We measured the changes in deep-level defects using Deep Level Transient Spectroscopy (DLTS) and we conducted an electrical characteristic of J-V measurement and Hall measurement to analyzed the effects of annealing atmosphere on Ga₂O₃/SiC heterojunction diode. In the N₂ annealed devices, the highest on-state current was measured as 3.06 × 10^-2 A/cm^2, and an increase in carrier concentration of 3.8 × 10¹⁴ cm^-3 was observed. This confirms that the variations in deep level defects due to the post-annealing atmosphere can influence the electrical properties.

• Analytical Science and Technology
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• v.5 no.2
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• pp.213-216
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• 1992

Semiinsulating GaAs crystals employing LPLEC technique should be grown from the Ga-rich melt due to a very low incorporation of unintentional impurities such as carbon (<$10^{15}cm^{-3}$). High resisitivity of this material can be derived from the balanced compensation among not only EL2 deep donors and carbon acceptors but also H1 double charge native acceptors(Ev + 77meV, Ev + 200 meV) and H2 native acceptors(Ev + 68 meV). Considering of the complicated compensation mechanism using statistical calculation of the electron occupancy of each level, SI GaAs crystal with low impurity contents(<$10^{15}cm^{-3}$) can be successfully obtained by maintaining the melt composition around 0.45 As mole fraction.

• Journal of IKEEE
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• v.18 no.4
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• pp.620-624
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• 2014

In this study, the electrical characteristics of Ni/CNT/$SiO_2$ structures were investigated in order to analyze the mechanism of carbon nanotubes in 4H-SiC MIS device structures. We fabricated 4H-SiC MIS capacitors with or without carbon nanotubes. Carbon nanotubes were dispersed by isopropyl alcohol. The capacitance-voltage (C-V) is characterized at 300 to 500K. The experimental flat-band voltage ($V_{FB}$) shift was positive. Near-interface trapped charge density and oxide trapped charge density values of Ni/CNT/$SiO_2$ structure were less than values of reference samples. With increasing temperature, the flat-band voltage was negative. It has been found that its oxide quality is related to charge carriers or defect states in the interface of 4H-SiC MIS capacitors. Gate characteristics of 4H-SiC MIS capacitors can be controlled by carbon nanotubes between Ni and $SiO_2$.