• 한국표면공학회:학술대회논문집
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• 한국표면공학회 1999년도 추계학술발표회 초록집
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• pp.49-49
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• 1999

In this study, $Cl_2/BCI_3$ magnetized inductively coupled plasmas (MICP) were used to etch GaN and the effects of magnetic confinements of inductively coupled plasmas on the GaN etch characteristics were investigated as a function of $Cl_2/BCI_3$. Also, the effects of Kr addition to the magnetized $Cl_2/BCI_3$ plasmas on the GaN etch rates were investigated. The characteristics of the plasmas were estimated using a Langmuir probe and quadrupole ma~s spectrometry (QMS). Etched GaN profiles were observed using scanning electron microscopy (SEM). The small addition of $Cl_2/BCI_3$ (10-20%) in $Cl_2$ increased GaN etch rates for both with and without the magnetic confinements. The application of magnetic confinements to the $Cl_2/BCI_3$ inductively coupled plasmas (ICP) increased GaN etch rates and changed the $Cl_2/BCI_3$ gas composition of the peak GaN etch rate from 10% $BCI_3$ to 20% $BCI_3$. It also increased the etch selectivity over photoresist, while slightly reducing the selectivity over $Si0_2$. The application of the magnetic field significantly increased positive $BCI_2{\;}^+$ measured by QMS and total ion saturation current measured by the Langmuir probe. Other species such as CI, BCI, and CI+ were increased while species such as $BCl_2$ and $BCI_3$ were decreased with the application of the magnetic field. Therefore, it appears that the increase of GaN etch rate in our experiment is related to the increased dissociative ionization of $BCI_3$ by the application of the magnetic field. The addition of 10% Kr in an optimized $Cl_2/BCI_3$ condition (80% $Cl_2/$ 20% $BCI_3$) with the magnets increased the GaN etch rate about 60%. More anisotropic GaN etch profile was obtained with the application of the magnetic field and a vertical GaN etch profile could be obtained with the addition of 10% Kr in an optimized $Cl_2/BCI_3$ condition with the magnets.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2012년도 제42회 동계 정기 학술대회 초록집
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• pp.431-432
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• 2012

In the era of 20 nm scaled semiconductor volume manufacturing, Microelectronics Manufacturing Engineering Education is presented in this paper. The purpose of microelectronic engineering education is to educate engineers to work in the semiconductor industry; it is therefore should be considered even before than technology development. Three Microelectronics Manufacturing Engineering related courses are introduced, and how undergraduate students acquired hands-on experience on Microelectronics fabrication and manufacturing. Conventionally employed wire bonding was recognized as not only an additional parasitic source in high-frequency mobile applications due to the increased inductance caused from the wiring loop, but also a huddle for minimizing IC packaging footprint. To alleviate the concerns, chip bumping technologies such as flip chip bumping and pillar bumping have been suggested as promising chip assembly methods to provide high-density interconnects and lower signal propagation delay [1,2]. Aluminum as metal interconnecting material over the decades in integrated circuits (ICs) manufacturing has been rapidly replaced with copper in majority IC products. A single copper metal layer with various test patterns of lines and vias and $400{\mu}m$ by $400{\mu}m$ interconnected pads are formed. Mask M1 allows metal interconnection patterns on 4" wafers with AZ1512 positive tone photoresist, and Cu/TiN/Ti layers are wet etched in two steps. We employed WPR, a thick patternable negative photoresist, manufactured by JSR Corp., which is specifically developed as dielectric material for multi- chip packaging (MCP) and package-on-package (PoP). Spin-coating at 1,000 rpm, i-line UV exposure, and 1 hour curing at $110^{\circ}C$ allows about $25{\mu}m$ thick passivation layer before performing wafer level soldering. Conventional Si3N4 passivation between Cu and WPR layer using plasma CVD can be an optional. To practice the board level flip chip assembly, individual students draw their own fan-outs of 40 rectangle pads using Eagle CAD, a free PCB artwork EDA. Individuals then transfer the test circuitry on a blank CCFL board followed by Cu etching and solder mask processes. Negative dry film resist (DFR), Accimage$^{(R)}$, manufactured by Kolon Industries, Inc., was used for solder resist for ball grid array (BGA). We demonstrated how Microelectronics Manufacturing Engineering education has been performed by presenting brief intermediate by-product from undergraduate and graduate students. Microelectronics Manufacturing Engineering, once again, is to educating engineers to actively work in the area of semiconductor manufacturing. Through one semester senior level hands-on laboratory course, participating students will have clearer understanding on microelectronics manufacturing and realized the importance of manufacturing yield in practice.

• 한국재료학회지
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• 제16권4호
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• pp.225-230
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• 2006

Nanoimprint lithography (NIL) is a novel method of fabricating nanometer scale patterns. It is a simple process with low cost, high throughput and resolution. NIL creates patterns by mechanical deformation of an imprint resist and physical contact process. The imprint resist is typically a monomer or polymer formulation that is cured by heat or UV light during the imprinting process. Stiction between the resist and the stamp is resulted from this physical contact process. Stiction issue is more important in the stamps including narrow pattern size and wide area. Therefore, the antistiction layer coating is very effective to prevent this problem and ensure successful NIL. In this paper, an antistiction layer was deposited and characterized by PECVD (plasma enhanced chemical vapor deposition) method for metal stamps. Deposition rates of an antistiction layer on Si and Ni substrates were in proportion to deposited time and 3.4 nm/min and 2.5 nm/min, respectively. A 50 nm thick antistiction layer showed 90% relative transmittance at 365 nm wavelength. Contact angle result showed good hydrophobicity over 105 degree. $CF_2$ and $CF_3$ peaks were founded in ATR-FTIR analysis. The thicknesses and the contact angle of a 50 nm thick antistiction film were slightly changed during chemical resistance test using acetone and sulfuric acid. To evaluate the deposited antistiction layer, a 50 nm thick film was coated on a stainless steel stamp made by wet etching process. A PMMA substrate was successfully imprinting without pattern degradations by the stainless steel stamp with an antistiction layer. The test result shows that antistiction layer coating is very effective for NIL.

• 센서학회지
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• 제8권3호
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• pp.283-290
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• 1999

본 연구에서는 고효율 단결정 실리콘 태양전지의 제작방법인 PERL방식을 사용하여 비저항이 $0.1{\sim}2{\Omega}{\cdot}cm$을 갖는 (100)면의 p형실리콘 기판으로 $n^+/p/p^+$ 접합의 태양전지를 제작하였다. 이를 위해 웨이퍼의 절단, KOH을 사용한 역피라미드 모양으로의 에칭, 인과붕소의 도핑, 반사방지막과 전극의 증착 및 열처리 등의 공정을 행하였다. 이때 소자표면의 광학적인 특성과 도핑농도가 저항값에 미치는 영향을 조사하고, Silvaco로 $n^+$도핑에 대한 확산 깊이와 도핑농도를 시뮬레이션하여 측정치와 비교하였다. AM(air mass) 1.5 조건하에서 입사되는 빛의 세기가 $100\;mW/cm^2$인 경우의 단락전류는 43 mA, 개방전압은 0.6 V, 그리고 충실도는 0.62였다. 이때 제작된 태양전지의 광전변환효율은 16%였다.