• 대한전기학회:학술대회논문집
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• 대한전기학회 2007년도 춘계학술대회 논문집 전기기기 및 에너지변환시스템부문
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• pp.150-152
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• 2007

The stator faults yield asymmetrical operation of induction machines, such as irregular current, torque pulsation, increased losses and decreased average torque. So it is necessary to detect the stator faults and develope the monitoring system for detecting faults including vibration and noise. This paper describes the method to analysis the induction motors with the stator winding inter-turn short for investigation of the asymmetrical operation during normal and transient states. And a simple method is used for the simulation and analysis of the induction machines with stator asymmetries. Finally, simulation results, finite element analysis and experimental ones are presented. The results can be useful for real-time on-line monitoring of an induction motor.

• 한국안전학회지
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• 제32권3호
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• pp.15-20
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• 2017

This study presented the strength of the materials and parts for smart distribution board fabrication, and developed a work operation process chart for smart distribution board fabrication. This work operation process chart for smart distribution board fabrication complied with SPS-KEMC regulations, and the applicable range and object are less than 1,000 V and 1,000 Hz for the AC distribution board and less than 1,500 V for the DC distribution board. The power supply is 3 phase 4 wires ($3{\Phi}$ 4W), divided into a single phase circuit and a 3 phase circuit. In addition, the circuit was configured so that the leakage current flowing through the distribution line of the load could be monitored in real time by using the sensor module installed at the rear end of the circuit breaker. Therefore, the administrator can easily find the risk factor of the load since engineer can check the leakage current of each distribution line. In addition, if a leakage current greater than standard value flows, it is possible to generate an alarm against a short circuit and cut off the leakage current. The work operation process chart for the smart distribution board fabrication consists of the following steps: raw and subsidiary materials, sheet metal work, tube making, welding, painting, busbar fabrication, assembly and wiring, product inspection, shipment, etc. Moreover, symbols, ${\Delta}$, ${\nabla}$, ${\bigcirc}$, ${\Rightarrow}$, etc. were used according to the type of work and work progress so that workers can easily understand the progress of the work.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2015년도 제46회 하계학술대회
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• pp.433-434
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• 2015

Dictionary meaning of circuit-breaker is a mechanical switching device, capable of making, carrying and breaking currents under normal circuit conditions and also making, carrying for a specified time and breaking currents under specified abnormal circuit conditions such as those of short circuit. and it had been recognized as being operated simultaneously. Controlled Switching System(CSS), which is technology for individual pole operation, are widely used to reduce transient phenomenon, for example switching surges, inrush current, for a all switching cases and nowadays it have become and economical solution for a switching place. The conventional solution to these problem is the use of pre-insertion resistors of $520{\Omega}$. However, it is recognised that the cost for products and maintenance are expensive and this apparatus makes more complex the circuit-breaker mechanism. Korea Electric Power Cooperation (KEPCO) has been study for relevant CCS technology since pilot application in substation in 2003 and plan to apply the actual power grid in 2017. This paper deals with the investigation of international CCS operation status and preview for application in KEPCO power grid.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2002년도 하계종합학술대회 논문집(4)
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• pp.81-84
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• 2002

This paper presents the real-time PCB(Printed circuit board) inspection system that can detect thin open/short error using the line scan camera. After a overall introduction of our system, the outline of our inspection methods are described. The goal of our inspection system is the real time and detailed inspection using the line scan camera. To perform inspection processing in real-time, we utilize double buffering structure. In order to solve the problem of unexpectable pixels of PCB, we propose melting process which eliminates unexpectable pixels of PCB. The design and development of our prototype of PCB ins- pection system is discussed and test results are presented to show the effectiveness of the developed inspection algorithm.

• 전기학회논문지
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• 제64권3호
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• pp.498-504
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• 2015

This paper proposed an Spread Spectrum Time Domain Reflectometry (SSTDR) using time-frequency correlation analysis in order to have more accurate fault determination and location detection than classical SSTDR despite increased signal attenuation due to the long distance to cable fault location. The proposed method was validated through comparison with classical SSTDR methods in open- and short-circuit fault detection experiments of low-voltage power cables. The experimental results showed that the proposed method can detect correlation coefficients at fault locations accurately despite reflected signal attenuation so that cable faults can be detected more accurately and clearly in comparison to existing methods.

• Journal of Power Electronics
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• 제16권1호
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• pp.1-8
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• 2016

Dead time is typically incorporated in voltage source inverter systems to prevent short circuit cases. However, dead time causes an error between the output voltage and reference voltage. Hence, voltage equation-based algorithms, such as motor parameter estimation and back electromotive force (EMF)-based sensorless algorithms, are prone to estimation errors. Several dead-time compensation methods have been developed to reduce output voltage errors. However, voltage errors are still common in zero current crossing areas, and an effect of the error is much worse in a low speed region. Therefore, employing voltage equation-based algorithms in low speed regions is difficult. This study analyzes the conventional dead-time compensation method and output voltage errors in low speed operation areas. A current shaping method that can reduce output voltage errors is also proposed. Experimental results prove that the proposed method reduces voltage errors and improves the accuracy of the parameter estimation method and the performance of the back EMF-based sensorless algorithm.

• 전기학회논문지
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• 제57권3호
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• pp.398-402
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• 2008

Recently, the development of superconducting fault current limiters (SFCLs) has been required as power demands increase in the power system. A distribution-level prototype resistive SFCL using coated conductor (CC) has been developed by Hyundai Heavy Industries Co., Ltd. and Yonsei University for the first time in the world. The ratings of the SFCL are 13.2kV/630A at normal operating condition. A novel non-inductive winding method is used in fabricating coils so there is almost zero impedance during normal operation. The distribution SFCL is cooled by sub-cooled liquid nitrogen $(LN_2)$ of 65K and 3 bar to enhance cryo-dielectric performance, critical current density, and thermal conductivity. In order to make reliable operation of an SFCL in real power systems, we monitored and controled its operation conditions by using supervisory control and data acquisition (SCADA) method. Thus, a monitoring system for the SFCL employing information technology (IT) is proposed and developed to be on the lookout for the operation conditions such as inside temperature, inside pressure, $LN_2$ level, voltage and current. Since operation temperature should be kept constant, bang-bang control for temperature feedback with a heater attached to the cold head of cryo-cooler is applied to the system. Short-circuit tests with prospective fault current of 10kA and AC dielectric withstand voltage tests up to 143kV for 1 minute were successfully performed at Korea Electrotechnology Research Institute. This paper deals with the development of a distribution level SFCL and its monitoring system for reliable operation.

• 한국통신학회논문지
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• 제35권9B호
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• pp.1399-1406
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• 2010

기존 전력망에 ICT를 접목한 스마트 그리드 환경에서 고객니즈에 기반한 수용가 서비스를 도출하기 위하여 HV, FGD 및 정량설문조사를 통해 수용가의 전기사용 추구 가치와 Unmet 니즈를 분석하였다. 연구결과, 소비자들은 전기를 가전기기 이용을 더욱 '편리'하게 해주는 존재로 인식하고, 전자파 감전 감소의 '안전'을 추구하며, 이해가 쉽고 스트레스가 적은 전기 '절약'을 원하는 것으로 조사 되었다. 그리고 전기절약을 도와주는 간편한 '기능', 전기사용량이나 전자제품의 '정보', 전기절약 유도를 위한 '동기' 유발 등에 Unmet 니즈가 존재하는 것으로 분석 되었다. 본 연구에서는 고객이 추구하는 가치와 Unmet 니즈를 반영하여 전자기기에 대한 사용량 실시간 모니터링과 제어가 가능한 홈 네트워크와 결합된 서비스로서 에너지 사용량 알리미 서비스, 대기전력 차단 서비스, 댁내 가전기기 원격제어 서비스, 에너지 컨설팅 서비스 등 4종의 스마트 홈 서비스를 도출하였다. 미래 스마트 그리드 홈 서비스 고객은 4종 서비스 모두에 60%이상의 이용의향을 보였으며 특히 에너지 사용량 알리미 서비스와 대기전력 차단 서비스에 약 80%의 이용의향을 보였다.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2008년도 제39회 하계학술대회
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• pp.335-336
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• 2008

Overhead transmission lines are mainly crossing mountainous area. They are easily affected in weathers like typhoon, strong wind, lightning, heavy rain, or heavy snow. Sometimes these weathers cause transmission line faults. A lightning flashover is most often fault. Nowadays lightning density in KOREA is growing high and lightning flashovers occur more often. A lightning flashover on transmission line is mostly cleared by momentary operation of a circuit breaker, so power failure happens rarely. However, when both circuits trip simultaneously due to the lightning flashovers on double circuit transmission line, short time power failure and voltage drop happen. KEPCO has used transmission line arresters to avoid double circuit simultaneous trip out since 2003. And transmission line arresters cannot be installed with KEPCO's present metal fittings, so various fittings have been used for each transmission line arrester manufacturer. This paper introduces development and standardization of arc-horn and metal fittings for transmission line arrester which can be used for both existing lines and new lines in KEPCO.

• 대한전기학회논문지:시스템및제어부문D
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• 제53권11호
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• pp.768-775
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• 2004

The SSA technique in the digital circuit test is required to be repeated the input pattern stream to n bits output nodes n times in case of using a multiplexor. Because the method adopting a parallel/serial bit convertor to remove this inefficiency has disadvantage of requiring the test time n times for a pattern, the test strategy is required, which can enhance the test productivity by reducing the test time based on simplified fault detection mechanism. Accordingly, this paper proposes a test strategy which enhances the test productivity and efficiency by appling PAS (Parallel Signature Analysis) technique to those after analyzing the structure and characteristics of the digital devices including TTL and CMOS family ICs as well as ROM and RAM. The PSA technique identifies the faults by comparing the reminder from good device with reminder from the tested device. At this time, the reminder is obtained by enforcing the data stream obtained from output pins of the tested device on the LFSR(Linear Feedback Shift Resister) representing the characteristic equation. Also, the method to obtain the optimal signature analyzer is explained by furnishing the short bit input streams to the long bit input streams to the LFSR having 8, 12, 16, 20bit input/output pins and by analyzing the occurring probability of error which is impossible to detect. Finally, the effectiveness of the proposed test strategy is verified by simulating the stuck at 1 errors or stuck at 0 errors for several devices on typical 8051 digital board.