• 제목/요약/키워드: Semiconductor integrated circuit

검색결과 212건 처리시간 0.02초

RE circuit simulation for high-power LDMOS modules

  • fujioka, Tooru;Matsunaga, Yoshikuni;Morikawa, Masatoshi;Yoshida, Isao
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2000년도 ITC-CSCC -2
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    • pp.1119-1122
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    • 2000
  • This paper describes on RF circuit simulation technique, especially on a RF modeling and a model extraction of a LDMOS(Lateral Diffused MOS) that has gate-width (Wg) dependence. Small-signal model parameters of the LDMOSs with various gate-widths extracted from S-parameter data are applied to make the relation between the RF performances and gate-width. It is proved that a source inductance (Ls) was not applicable to scaling rules. These extracted small-signal model parameters are also utilized to remove extrinsic elements in an extraction of a large-signal model (using HP Root MOSFET Model). Therefore, we can omit an additional measurement to extract extrinsic elements. When the large-signal model with Ls having the above gate-width dependence is applied to a high-power LDMOS module, the simulated performances (Output power, etc.) are in a good agreement with experimental results. It is proved that our extracted model and RF circuit simulation have a good accuracy.

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Digital volume control 집적회로의 설계 및 제작 (Design and Fabrication of Digital Volum Control IC)

  • 장영욱;김영생;신명철
    • 대한전자공학회논문지
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    • 제23권6호
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    • pp.747-753
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    • 1986
  • This paper describes the design and fabrication of a digital volume control integrated circuit which replaces a mechanical volume control. The integrated circuit can be controlled volume by up/down switch. It has been fabricated by SST bipolar standard process. Its chip size is 2.5x2.5 mm\ulcorner As a result, we succeeded in fabrication of integrated circuit which satisfied DC characteristics and proper operation of volume control.

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확장형 자기 구조의 다중 결합 인덕터를 적용한 역률개선회로에 관한 연구 (Study on the Power Factor Correction Circuit Applying Multiple Coupling Inductor with Expandable Integrated Magnetic Structure)

  • 유정상;길용만;안태영
    • 반도체디스플레이기술학회지
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    • 제17권1호
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    • pp.21-26
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    • 2018
  • In this paper, a multiple coupling inductor with expandable-integrated magnetic structure was proposed to enable miniaturization of external switched mode power supply (SMPS) for a large display. Inductance formula of the proposed inductor structure was derived through magnetic circuit analysis for a simple inductance designing process. The proposed inductor was applied into a 1kW class interleaved bridgeless power factor correction circuit which requires four inductors, and experimental steady state result of the circuit was compared. According to the experimental result, it was found that the proposed multiple coupling inductor shows the electrical characteristics that can replace the conventional separated inductors and is suitable for miniaturization of the SMPS since the circuit configuration is possible with one shared inductor.

Digital Tuning Analog Component 집적회로의 설계 및 제작 (Design and Fabrication of Digital Tuning Analog Component IC)

  • 신명철;장영욱;김영생;고진수
    • 대한전자공학회논문지
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    • 제23권6호
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    • pp.923-928
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    • 1986
  • This paper describes the design and fabrication of a high performance digital tuning analog component integrated circuit that contains a television station detector and decoders(H and L types). When the comparator level sampling method is used, this integrated circuit can be used as a stable channel selector for an external circuit with very large signal variation. It has been fabricated using the SST bipolar standard process and its chip size is 2.2x2.1mm\ulcorner As a result, we have succeeded in fabricating the IC that satisfies the D.C characteristics, and the channel station detector and decoder function.

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보빈 적층 방식의 다중 공유결합 인덕터를 이용한 4병렬 스위칭 정류기에 관한 연구 (A Study on the Expandable Bobbin Type Multiple Integrated Coupled-Inductor Applied 4-Pralleled Switching Rectifier)

  • 유정상;안태영
    • 반도체디스플레이기술학회지
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    • 제18권4호
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    • pp.18-24
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    • 2019
  • In this paper, expandable bobbin type multiple integrated coupled-inductor applied 4-paralled switching rectifier was proposed. To design the proposed inductor easily, inductance designing formula was derived through magnetic circuit analysis of the 4-paralleled integrated coupled-inductor. Furthermore, to verify practicality of the proposed inductor, it was applied in 600W class 4-paralleled interleaved switching rectifier, and the steady-state characteristics of the proposed inductor and discrete inductors were compared. Consequently, it was showed that the proposed inductor can replace the conventional discrete inductors with alternative electrical characteristic standard, hence miniaturization of the SMPS can be achieved. From the test result, test circuit with the proposed inductor showed maximum 97.1% of power conversion efficiency and under 18W of power loss where the circuit with discrete inductors showed 96.7% and 20W respectively.

디스플레이 패널에 집적이 가능한 적외선 포토센서 (Integrated IR Photo Sensor for Display Application)

  • 전호식;허양욱;이재표;한상윤;배병성
    • 한국정밀공학회지
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    • 제29권11호
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    • pp.1164-1169
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    • 2012
  • This paper presents a study of an integrated infrared (IR) photo sensor for display application. We fabricated hydrogenated amorphous silicon thin film transistor (a-Si:H TFT) and hydrogenated amorphous silicon germanium thin film transistor (a-SiGe:H TFT) which were bottom gate structure. We investigated the dependence of a-SiGe:H TFT characteristics on incident wavelengths. We proposed photo sensor which responded to wavelengths of IR region. Proposed pixel circuit of photo sensor was consists of switch TFT and photo TFT, and one capacitor. We developed integrated photo sensor circuit and investigated the performance of the proposed sensor circuit according to the input wavelengths. The developed photo sensor circuit with a-SiGe:H TFT was suitable for IR.

Immunity Test for Semiconductor Integrated Circuits Considering Power Transfer Efficiency of the Bulk Current Injection Method

  • Kim, NaHyun;Nah, Wansoo;Kim, SoYoung
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제14권2호
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    • pp.202-211
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    • 2014
  • The bulk current injection (BCI) and direct power injection (DPI) method have been established as the standards for the electromagnetic susceptibility (EMS) test. Because the BCI test uses a probe to inject magnetically coupled electromagnetic (EM) noise, there is a significant difference between the power supplied by the radio frequency (RF) generator and that transferred to the integrated circuit (IC). Thus, the immunity estimated by the forward power cannot show the susceptibility of the IC itself. This paper derives the real injected power at the failure point of the IC using the power transfer efficiency of the BCI method. We propose and mathematically derive the power transfer efficiency based on equivalent circuit models representing the BCI test setup. The BCI test is performed on I/O buffers with and without decoupling capacitors, and their immunities are evaluated based on the traditional forward power and the real injected power proposed in this work. The real injected power shows the actual noise power level that the IC can tolerate. Using the real injected power as an indicator for the EMS test, we show that the on-chip decoupling capacitor enhances the EM noise immunity.

Technology Computer-Aided Design과 결합된 SPICE를 통한 금속-강유전체-반도체 전계효과 트랜지스터의 전기적 특성 해석 (Electrical analysis of Metal-Ferroelectric - Semiconductor Field - Effect Transistor with SPICE combined with Technology Computer-Aided Design)

  • 김용태;심선일
    • 마이크로전자및패키징학회지
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    • 제12권1호
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    • pp.59-63
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    • 2005
  • 금속-강유전체-반도체 전계효과 트랜지스터 (MFS/MFISFET)의 동작 특성을 technology computer-aided design (TCAD)과 simulation program with integrated circuit emphasis (SPICE)를 결합하여 전산모사하는 방법을 제시하였다. 복잡한 강유전체의 동작 특성을 수치해석을 이용하여 해석한 다음, 이를 이용하여 금속-강유전체-반도체 구조에서 반도체 표면에 인가되는 표면 전위를 계산하였다. 계산된 TCAD 변수인 표면 전위를 전계효과 트랜지스터의 SPICE 모델에서 구한 표면 전위와 같다고 보고게이트 전압에 따른 전류전압 특성을 구할 수 있었다. 이와 같은 방법은 향후 MFS/MFISFET를 이용한 메모리소자의 집적회로 설계에 매우 유용하게 적용될 수 있을 것이다.

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적응 훈련 신경망을 이용한 플라즈마 식각 공정 수율 향상을 위한 공정 분석 및예측 시스템 개발 (Development of Process Analysis and Prediction Systeme to Improve Yield in Plasma Etching Process Using Adaptively Trained Neural Network)

  • 최문규;김훈모
    • 한국정밀공학회지
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    • 제16권11호
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    • pp.98-105
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    • 1999
  • As the IC(Integrated Circuit) has been densified and complicated, it is required to thorough process control to improve yield. Experts, for this purpose, focused on the process analysis automation, which is came from the strict data management in semiconductor manufacturing. In this paper, we presents the process analysis system that can analyze causes, for a output after processes. Also, the plasma etching process that highly affects yield among semiconductor process is modeled to predict a output before the process. To approach this problem, we use adaptively trained neural networks that exhibit superior accuracy over statistical techniques. And in comparison with methods in other paper, a method that history of trend for input data is considered is shown to offer advantage in both learning and prediction capability. This research regards CD(Critical Dimension) that is considerable in high integrated circuit as output variable of the prediction model.

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Experimental Analysis of the Effect of integrated MEMS inductor on the 5GHz VCO performance

  • Lee, Joon-Yeop;Kim, Ji-Hyuk;Moon, Sung-Soo;Kim, Hyeon-Chul;Chun, Kuk-Jin
    • 한국반도체및디스플레이장비학회:학술대회논문집
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    • 한국반도체및디스플레이장비학회 2005년도 추계 학술대회
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    • pp.160-164
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    • 2005
  • In this paper, MEMS inductor was integrated on a 5GHz VCO using BCB as low-k dielectric layer for MEMS inductor. The VCO core circuit is realized by IBM SiGe process. We varied the spiral inductor's suspension height and posit ion on circuit, and studied their circuit interference effect on VCO performance. The VCO with inductor placed on BCB with More height and the VCO with inductor that was not positioned above active area showed better characteristics.

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