• Journal of Satellite, Information and Communications
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• v.10 no.3
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• pp.114-120
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• 2015

In this paper, we show the design requirements of the cryptographic module and its security algorithm designed to prevent the exposure of the command signal applied to Flight Termination System. The cryptographic module consists of two separate devices that are Command Insertion Device and Command Generation Device. The cryptographic module designed to meet the 3 principles(Confidentiality, Integrity and Availability) for the information security. AES-256 block encryption algorithm and SHA-256 Hash function were applied to the encrypted symmetric key encryption method. The proposed cryptographic module is expected to contribute to the security and reliability of the Flight Termination System for Space Launch Vehicle.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.19 no.5
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• pp.151-166
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• 2009

To prove the integrity of digital evidence on the investigation procedure, the data which is using the MD 5(Message Digest 5) hash-function algorithm has to be discarded, if the integrity was damaged on the investigation. Even though a proof restoration of the deleted area is essential for securing the proof regarding a main phase of a case, it was difficult to secure the decisive evidence because of the damaged evidence data due to the difference between the overall hash value and the first value. From this viewpoint, this paper proposes the novel model for the mobile forensic procedure, named as "E-Finder(Evidence Finder)", to ,solve the existing problem. The E-Finder has 5 main phases and 15 procedures. We compared E-Finder with NIST(National Institute of Standards and Technology) and Tata Elxsi Security Group. This paper thus achieved the development and standardization of the investigation methodology for the mobile forensics.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.26 no.7
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• pp.1071-1077
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• 2022

A security SoC that can be used to implement elliptic curve cryptography (ECC) based public-key infrastructures was designed. The security SoC has an architecture in which a hardware accelerator for the elliptic curve digital signature algorithm (ECDSA) is interfaced with the Cortex-A53 CPU using the AXI4-Lite bus. The ECDSA hardware accelerator, which consists of a high-performance ECC processor, a SHA3 hash core, a true random number generator (TRNG), a modular multiplier, BRAM, and control FSM, was designed to perform the high-performance computation of ECDSA signature generation and signature verification with minimal CPU control. The security SoC was implemented in the Zynq UltraScale+ MPSoC device to perform hardware-software co-verification, and it was evaluated that the ECDSA signature generation or signature verification can be achieved about 1,000 times per second at a clock frequency of 150 MHz. The ECDSA hardware accelerator was implemented using hardware resources of 74,630 LUTs, 23,356 flip-flops, 32kb BRAM, and 36 DSP blocks.

• Journal of KIISE:Computing Practices and Letters
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• v.7 no.3
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• pp.220-228
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• 2001

Digital watermarking is a technique for the purpose of protecting the ownership of the image by embedding invisible watermarks in a digital imnge. To guarantee the security of the digital watermarking scheme for copyright protection, it is required to satisfy some requirements robustness and perceptual invisibility which provided by the location of embedded bits, the public watermarking algorithm, and the hidden use of the key, which can protect unauthorized accesses from illegal users. For this, in this paper we propose a new copyright watermarking scheme, which is based on one-way hash functions using RSA functions and modular operations. RSA functions are widely used in cryptographic systems. Our watermarking scheme is robust against LSB(Jeast significant bit) attacks and gamma corresction attack, and is also perceptually invisible. We demonstrate the characteristics of our proposed watermarking scheme through experiments.