• 제어로봇시스템학회:학술대회논문집
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• 1997.10a
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• pp.1880-1883
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• 1997

An Parallax-Barrier type autostereoscopic display system is implemented to overcome the handicap of current glass-typed stereo imaging system which gives operators unnatural feeling and reluctance. This system is composed of image mixing part of two input images, A/D transformation part, scan conversion part to eliminate the rainbow interference phenomenon, and pin-hole type barrier lens. For the fine display the accurate slit width of barrier is calculated in consideration of retina size, and the samsung 10.4" TFT-LCO was used as flat display monitor.itor.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.10 no.5
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• pp.942-946
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• 2009

A scan order converter has to be placed before the JPEG encoder to provide $8{\times}8$ blocks from the pixels in raster scan order. Recently a hardware architecture has been proposed to implement a scan converter based on the single line memory. Since both read and write accesses happen at each cycle, however, the largest part of the entire power budget is occupied by the SRAM itself. In this paper, the data packing and unpacking procedure is inserted in the processing chain, such that the access frequency to the SRAM is reduced to 1/8 by adopting a packed larger data unit. The simulation results show that the resultant power consumption is reduced down to 16% for the SXGA resolution.

• The Transactions of the Korean Institute of Electrical Engineers
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• v.43 no.3
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• pp.504-514
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• 1994

Combinational automatic test pattern generators (CATPG) have already been commercialized because their algorithms are well known and practical, while sequential automatic test pattern generators(SATPG) have been regarded as impractical because they are computationally complex. A technique to use CATPG instead of SATPG for test generation of sequential circuits is proposed. Redesign of seauential circuits such as Level Sensitive Scan Design (LSSD) is inevitable to use CATPG. Various partial scan techniques has been proposed to avoid full scan such as LSSD. It ha sbeen reported that SATPG is required to use partial scan techniques. We propose a technique to use CATPG for a new partial scan technique, and propose a new CATPG algorithm for the partially scanned circuits. The partial scan technique can be another choice of design for testability because it is computationally advantageous.

• Journal of the Korea Fashion and Costume Design Association
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• v.22 no.1
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• pp.1-13
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• 2020

The purpose of this study is to create a 3D avatar from 3D human body shape data using the CLO 3D virtual clothing program and to verify the feasibility of avatar production using the virtual clothing system for verifying size and shape. The research method was to select one virtual representative model that is the closest to the mean size of each body item for each age group. Using the 3D human body scan shape of a 40-69 years old male was applied to the CLO 3D virtual wearing system. Using the CLO 3D Avatar conversion menu, we verified the feasibility of creating a 3D avatar that reproduces the human body scan shape. In the dimension comparison between the 3D avatar and the fictitious representative model, the dimension difference was noticeable in height, circumference, and length. However, as a result, the converted 3D avatar showed less than a 5% difference in most human dimensions. In addition, since the body shape and posture were reproduced similarly, the utilization of the avatar was verified.

• 한국정보디스플레이학회:학술대회논문집
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• 2002.08a
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• pp.347-350
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• 2002

Transposed scan is an innovation that paves the road to ultra-slim CRTs with deflection angles up to 135$^{\circ}C$ We discuss the integration of video transposition with the other video processing functions in the television set. An in-place transposition algorithm which minimizes the amount of frame memory is proposed as a low-cost solution for transposed scan conversion. The difference in visual perception of transposed scan and normal scan depends on the frame rate and the line density of the video format. We found that for high frame rates and high line densities, no difference was perceived for both scan modes.

• Proceedings of the KIEE Conference
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• 1992.07b
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• pp.1250-1254
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• 1992

This paper describes the designed and fabricated thermal imaging system with the SPRITE(Signal PRocessing in The Element) detector, operating in the 3-12 micron band. This system consists of an afocal telescope, a scan unit containing the SPRITE detector, an electronic processor unit and a cooler. The optical scan system utilizing rotating polygon and oscillating mirror, is 2-dimensional serial/parallel scan type using five elements of the detector. And the electronic processor unit performs digital scan conversion to reform the parallel data stream into serial analog data compatable with conventional RS-170 video. The scan field of view is 40 ${\times}$ 26.7 and the MRTD(Minium Resolvable Temperature Difference) is 0.6 K at 7.5 cycles/mm. The acquired thermal image indicates that this system has a satisfactory performance.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.11 no.11
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• pp.2107-2115
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• 2007

In this paper, the scan conversion processor which converts the triangle represented by three vertices into pixel-level screen coordinates, depth coordinate, and color data is designed. The processor adopts scan-line algorithm which decomposes triangle into horizontal spans and then transforms the span into pixel data. By supporting top-left filling convention, it ensures that triangles that share an edge do not produce any dropouts or overlaps between adjacent polygons. It consists of about 21,400 gates and its maximum operating frequency is about 80 Mhz under 0.35um CMOS technology. Because its maximum pixel rate is about 80 Mpixels/sec, it can be applicable to mobile graphics application.

• Analytical Science and Technology
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• v.14 no.5
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• pp.384-391
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• 2001

In this study, a new quantitative analytical method has been developed for the rapid determination of acylcarnitines and amino acids in human blood using electrospray ionization / tandem mass spectrometry (ESI-MS/MS). Acylarmitines and amino acids were analyzed by tandem mass spectrometry after conversion to their butylesters through treatment with 3N butanolic hydrogen chloride. Acylcrnitines were analyzed using precursor 85 ion scan and alanine, valine, leucine/isoleucine, methionine, phenylalanine, tyrosine, aspartic acid and glutamic acid were analyzed using neutral loss 102 scan, ornitine and citrulline were analyzed neutral loss 119 scan, glycine was analyzed using neutral loss 56 scan, arginine was analyzed using neutral loss 161 scan and argininosuccinic acid was analyzed product ion 459 scan. This method reduced sample preparation time compared to that with conventional amino acid analyzer and liquid chromatography, with high sensitivity and good reproducibility.

• Journal of the Korean Home Economics Association
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• v.46 no.9
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• pp.137-146
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• 2008

This study was conducted in order to spread out lower body 3D scan data of men in their twenties. The aim was to achieve slacks pattern with ease allowance through comparison with existing flat patterns. For conversion of 3D scan data into 20 pattern, reference lines were established by using Rapid Foam in 3D shape analysis software. 2C-AN program and Yuka CAD were used to convert 20 pattern earned with straight posture of 3D scan data into slacks pattern by using Triangle Simplification & Runge-Kutta Method. In order to achieve this we needed to set a line 9cm below the hip line, to array vertex of each block to crease line while maintaining the horizontal line. And then we needed to set ease allowance in back crotch and to set waist circumference or hip circumference ease allowance in side seam of slacks. Results showed that long front crotch length can be achieved if 3D scan data is compared with 20 existing flat pattern. Slacks pattern that raise front crotch by about 1.5cm compared to back crotch and also possess ease allowance in back crotch area are great in appearance evaluation.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.8
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• pp.61-66
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• 2008

Recently, portable devices which require small area and low power consumption employ applications using 3D graphics such as 3D games and 3D graphical user interfaces. We propose an efficient clipping engine algorithm which is suitable in 3D graphics pipeline. The clipping operation is divided into two steps: one is the selection process in the transformation engine and the other is the pixel clipping process in the scan conversion unit. The clipping operation is possible with addition of simple comparator. The clipping for the Y-axis is achieved in the edge walk stage and that for the X and Z-axis is performed in the span processing. The proposed clipping algorithm reduces the operation cycles and the area of of 3D graphics pipelines. We designed a 3D graphics pipeline with the proposed clipping algorithm using Verilog-HDL and verifies the operation using an FPGA.