• Title/Summary/Keyword: Scaling-Simulation

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Efficient Schemes for Scaling Ring Bandwidth in Ring-based Multiprocessor System (링 구조 다중프로세서 시스템에서 링 대역폭 확장을 위한 효율적인 방안)

  • Jang, Byoung-Soon;Chung, Sung-Woo;Jhang, Seong-Tae;Jhon, Chu-Shik
    • Journal of KIISE:Computer Systems and Theory
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    • v.27 no.2
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    • pp.177-187
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    • 2000
  • In the past several years, many systems which adopted ring topology with high-speed unidirectional point-to-point links have emerged to overcome the limit of bus for interconnection network of clustered multiprocessor system. However, rapid increase of processor speed and performance improvement of local bus and memory system limit scalability of system with point-to-point link of standard bandwidth. Therefore, necessity to extend bandwidth is emphasized. In this paper, we adopt PANDA system as base model, which is clustering-based multiprocessor system. By simulating a model adopting commercial processor and local bus specification, we show that point-to-point link is bottleneck of system performance, and bandwidth expansion by more than 200% is needed. To expand bandwidth of interconnection network, it needs excessive design cost and time to develop new point-to-point link with doubled bandwidth. As an alternative to double bandwidth, we propose several ways to implement dual ring -simple dual ring, transaction-separated dual ring, direction-separated dual ring- by using off-the-shelf point-to-point links with IEEE standard bandwidth. We analyze pros. and cons. of each model compared with doubled-bandwidth single ring by simulation.

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Back-end Prefetching Scheme for Improving the Performance of Cluster-based Web Servers (클러스터 웹 서버에서 성능 향상을 위한 노드간 선인출 기법)

  • Park, Seon-Yeong;Park, Do-Hyeon;Lee, Joon-Won;Cho, Jung-Wan
    • Journal of KIISE:Computer Systems and Theory
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    • v.29 no.5
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    • pp.265-273
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    • 2002
  • With the explosive growth of WWW traffic, there is an increasing demand for the high performance Web servers to provide a stable Web service to users. The cluster-based Web server is a solution to core with the heavy access from users, easily scaling the server according to the loads. In the cluster-based Web sewer, a back-end node may not be able to serve some HTTP requests directly because it does not have the requested contents in its main memory. In this case, the back-end node has to retrieve the requested contents from its local disk or other back-end nodes in the cluster. To reduce service latency, we introduce a new prefetch scheme. The back-end nodes predict the next HTTP requests and prefetch the contents of predicted requests before the next requests arrive. We develop three prefetch algorithms bated on some useful information gathered from many clients'HTTP requests. Through trace-driven simulation, the service latency of the prefetch scheme is reduced by 10 ~ 25% as compared with no prefetch scheme. Among the proposed prefetch algorithms, Time and Access Probability-based Prefetch (TAP2) algorithm, which uses the access probability and the inter-reference time of Web object, shows the best performance.

Efficient Bitrate Control Scheme for Scalable Video Codec (Scalable Video Codec을 위한 효율적인 비트율 제어기법)

  • Park Nae-Ri;Jeon Dong-San;Kim Jae-Gon;Han Jong-Ki
    • Journal of Broadcast Engineering
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    • v.10 no.4 s.29
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    • pp.488-504
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    • 2005
  • In this paper, we propose a new bitrate control scheme to improve the quality of image encoded by SVC and to resolve the problems of conventional scheme. In JSVM2.0, bitrate of a frame is controlled by an initial quantization parameter and scaling factor that it hasdifferent value according to frame. Itis difficult to get the best of video quality at arbitrary bitrate because the conventional scheme has two defects. One is that we have to know proper initial QP's fur all sequences. Another is that QP's control skill for macroblocks is very inefficient. In this paper, we propose an efficient bit allocation algorithm to reduce the effect of the initial QP and to increase the efficiency of bit allocation by using proper QP's for macroblocks. In simulation results, it can be seen that using the proposed scheme enables the SVC encoder to control the bitrate by the macroblock unit and outperforms the conventional schemes in the respect of rate-distortion.

Reference Frame Memory Compression Using Selective Processing Unit Merging Method (선택적 수행블록 병합을 이용한 참조 영상 메모리 압축 기법)

  • Hong, Soon-Gi;Choe, Yoon-Sik;Kim, Yong-Goo
    • Journal of Broadcast Engineering
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    • v.16 no.2
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    • pp.339-349
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    • 2011
  • IBDI (Internal Bit Depth Increase) is able to significantly improve the coding efficiency of high definition video compression by increasing the bit depth (or precision) of internal arithmetic operation. However the scheme also increases required internal memory for storing decoded reference frames and this can be significant for higher definition of video contents. So, the reference frame memory compression method is proposed to reduce such internal memory requirement. The reference memory compression is performed on 4x4 block called the processing unit to compress the decoded image using the correlation of nearby pixel values. This method has successively reduced the reference frame memory while preserving the coding efficiency of IBDI. However, additional information of each processing unit has to be stored also in internal memory, the amount of additional information could be a limitation of the effectiveness of memory compression scheme. To relax this limitation of previous memory compression scheme, we propose a selective merging-based reference frame memory compression algorithm, dramatically reducing the amount of additional information. Simulation results show that the proposed algorithm provides much smaller overhead than that of the previous algorithm while keeping the coding efficiency of IBDI.

Joint Optimization of the Motion Estimation Module and the Up/Down Scaler in Transcoders television (트랜스코더의 해상도 변환 모듈과 움직임 추정 모듈의 공동 최적화)

  • Han, Jong-Ki;Kwak, Sang-Min;Jun, Dong-San;Kim, Jae-Gon
    • Journal of Broadcast Engineering
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    • v.10 no.3
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    • pp.270-285
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    • 2005
  • A joint design scheme is proposed to optimize the up/down scaler and the motion vector estimation module in the transcoder system. The proposed scheme first optimizes the resolution scaler for a fixed motion vector, and then a new motion vector is estimated for the fixed scaler. These two steps are iteratively repeated until they reach a local optimum solution. In the optimization of the scaler, we derive an adaptive version of a cubic convolution interpolator to enlarge or reduce digital images by arbitrary scaling factors. The adaptation is performed at each macroblock of an image. In order to estimate the optimal motion vector, a temporary motion vector is composed from the given motion vectors. Then the motion vector is refined over a narrow search range. It is well-known that this refinement scheme provides the comparable performance compared to the full search method. Simulation results show that a jointly optimized system based on the proposed algorithms outperforms the conventional systems. We can also see that the algorithms exhibit significant improvement in the minimization of information loss compared with other techniques.

A Design of Memory-efficient 2k/8k FFT/IFFT Processor using R4SDF/R4SDC Hybrid Structure (R4SDF/R4SDC Hybrid 구조를 이용한 메모리 효율적인 2k/8k FFT/IFFT 프로세서 설계)

  • 신경욱
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.8 no.2
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    • pp.430-439
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    • 2004
  • This paper describes a design of 8192/2048-point FFT/IFFT processor (CFFT8k2k), which performs multi-carrier modulation/demodulation in OFDM-based DVB-T receiver. Since a large size FFT requires a large buffer memory, two design techniques are considered to achieve memory-efficient implementation of 8192-point FFT/IFFT. A hybrid structure, which is composed of radix-4 single-path delay feedback (R4SDF) and radix-4 single-path delay commutator (R4SDC), reduces its memory by 20% compared to R4SDC structure. In addition, a memory reduction of about 24% is achieved by a novel two-step convergent block floating-point scaling. As a result, it requires only 57% of memory used in conventional design, reducing chip area and power consumption. The CFFT8k2k core is designed in Verilog-HDL, and has about 102,000 Bates, RAM of 292k bits, and ROM of 39k bits. Using gate-level netlist with SDF which is synthesized using a $0.25-{\um}m$ CMOS library, timing simulation show that it can safely operate with 50-MHz clock at 2.5-V supply, resulting that a 8192-point FFT/IFFT can be computed every 164-${\mu}\textrm{s}$. The functionality of the core is fully verified by FPGA implementation, and the average SQNR of 60-㏈ is achieved.

Comparison of Forest Carbon Stocks Estimation Methods Using Forest Type Map and Landsat TM Satellite Imagery (임상도와 Landsat TM 위성영상을 이용한 산림탄소저장량 추정 방법 비교 연구)

  • Kim, Kyoung-Min;Lee, Jung-Bin;Jung, Jaehoon
    • Korean Journal of Remote Sensing
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    • v.31 no.5
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    • pp.449-459
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    • 2015
  • The conventional National Forest Inventory(NFI)-based forest carbon stock estimation method is suitable for national-scale estimation, but is not for regional-scale estimation due to the lack of NFI plots. In this study, for the purpose of regional-scale carbon stock estimation, we created grid-based forest carbon stock maps using spatial ancillary data and two types of up-scaling methods. Chungnam province was chosen to represent the study area and for which the $5^{th}$ NFI (2006~2009) data was collected. The first method (method 1) selects forest type map as ancillary data and uses regression model for forest carbon stock estimation, whereas the second method (method 2) uses satellite imagery and k-Nearest Neighbor(k-NN) algorithm. Additionally, in order to consider uncertainty effects, the final AGB carbon stock maps were generated by performing 200 iterative processes with Monte Carlo simulation. As a result, compared to the NFI-based estimation(21,136,911 tonC), the total carbon stock was over-estimated by method 1(22,948,151 tonC), but was under-estimated by method 2(19,750,315 tonC). In the paired T-test with 186 independent data, the average carbon stock estimation by the NFI-based method was statistically different from method2(p<0.01), but was not different from method1(p>0.01). In particular, by means of Monte Carlo simulation, it was found that the smoothing effect of k-NN algorithm and mis-registration error between NFI plots and satellite image can lead to large uncertainty in carbon stock estimation. Although method 1 was found suitable for carbon stock estimation of forest stands that feature heterogeneous trees in Korea, satellite-based method is still in demand to provide periodic estimates of un-investigated, large forest area. In these respects, future work will focus on spatial and temporal extent of study area and robust carbon stock estimation with various satellite images and estimation methods.