• Title/Summary/Keyword: SPWM

검색결과 96건 처리시간 0.033초

LCL 필터의 성능 검증을 위한 SPWM 제어기반의 3상 인버터 출력 파형 발생 장치 개발 및 적용 연구 (Development And Application of Three-phase Inverter Output Wave Generator based on SPWM Control to Verify the Performance of LCL filters)

  • 임동균;강창균;하원진;촐롱바타르;고윤석
    • 한국전자통신학회논문지
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    • 제17권5호
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    • pp.841-852
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    • 2022
  • 본 논문에서는 LCL 필터의 성능 검증을 위한 SPWM 제어기반의 3상 인버터 출력 파형 발생 장치를 개발하였다. 필터의 성능 검증을 위한 검사 신호를 얻기 위해 먼저, DSP 기반의 3상 SPWM 신호 생성 알고리즘을 개발하였으며, 동시에 3개의 하프 브리지 게이트 드라이버를 이용하여 SPWM 게이트 구동 신호들로부터 3상 SPWM 출력 파형을 발생시키기 위한 3상 전압형 인버터 회로를 설계하였다. 다음, 개발된 SPWM 기반 3상 인버터 출력 파형 장치의 검사 신호 발생 장치로서의 유효성을 검증하기 위해 하나의 LCL 필터가 실험, 제작되었으며, DSP 기반의 성능 검증 시스템이 실험적으로 구축되었다. 끝으로, 주어진 시비율을 가지는 출력 제어 실험에서 LCL 필터의 전 후의 3상 전압 파형을 비교함으로써 SPWM 기반 3상 인버터 출력파형 발생 장치의 유효성을 확인할 수 있었다.

An Improved SPWM Strategy to Reduce Switching in Cascaded Multilevel Inverters

  • Dong, Xiucheng;Yu, Xiaomei;Yuan, Zhiwen;Xia, Yankun;Li, Yu
    • Journal of Power Electronics
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    • 제16권2호
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    • pp.490-497
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    • 2016
  • The analysis of the switch status of each unit module of a cascaded multi-level inverter reveals that the working condition of the switch of a chopper arm causes unnecessary switching under the conventional unipolar sinusoidal pulse width modulation (SPWM). With an increase in the number of cascaded multilevel inverters, the superposition of unnecessary switching gradually occurs. In this work, we propose an improved SPWM strategy to reduce switching in cascaded multilevel inverters. Specifically, we analyze the switch state of the switch tube of a chopper arm of an H-bridge unit. The redundant switch is then removed, thereby reducing the switching frequency. Unlike the conventional unipolar SPWM technique, the improved SPWM method greatly reduces switching without altering the output quality of inverters. The conventional unipolar SPWM technique and the proposed method are applied to a five-level inverter. Simulation results show the superiority of the proposed strategy. Finally, a prototype is built in the laboratory. Experimental results verify the correctness of the proposed modulation strategy.

3상 6펄스 PWM 정류기의 D-Q 제어 기반 출력전압 제어 알고리즘 및 EMTP-RV 시뮬레이션 연구 (A Study on the D-Q Control based Output Voltage Control Algorithm and EMTP-RV Simulation of Three-phase 6-Pulse PWM Rectifier)

  • 고윤석
    • 한국전자통신학회논문지
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    • 제16권1호
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    • pp.45-52
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    • 2021
  • 3상 PWM 정류기에 대한 공간벡터제어 기반 전압제어방식은 스위칭 구간에 대한 스위칭 패턴을 설계해야하기 때문에 최적한 스위칭 패턴을 설계하는데 많은 노력이 요구된다. 본 연구에서는 3상 6펄스 전압형 PWM 정류기를 위한 D-Q 제어에 기반 한 SPWM 출력전압 제어 알고리즘을 연구하였다. 출력전압제어 알고리즘에서 3상 기준신호들은 공간벡터 표시법에 기반 한 D-Q 변환으로부터 얻어지며 스위칭 패턴 대신에 SPWM 방식을 이용하여 정류기 스위칭 제어 신호들을 생성하도록 하였다. 다음으로, EMTP-RV를 이용하여 D-Q 제어기반 SPWM 방식을 가지는 3상 6펄스 전압형 PWM 정류기를 모델링하였다. 끝으로, EMTP-RV 시뮬레이션을 통해 얻어지는 출력전압파형을 기준 값과 비교, 출력전압이 기준전압을 정확하게 추종함을 확인함으로서 D-Q 제어기반 SPWM 전압제어 알고리즘의 유효성을 확인할 수 있었다.

Half-Cycle-Waveform-Inversed Single-Carrier Seven-level Sinusoidal Modulation

  • Wu, Fengjiang;Sun, Bo;Zhang, Lujie;Sun, Li
    • Journal of Power Electronics
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    • 제13권1호
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    • pp.86-93
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    • 2013
  • A half-cycle-waveform inversion based three reference modulations seven-level SPWM (TRM-SPWM) scheme with one carrier is proposed in this paper. To keep the same comparison logics for the modulations and carrier during the negative half cycle and the positive one for the modulations, in the negative half cycle of the modulations, the DC offsets related to the amplitude of the carrier are set on the three modulations, respectively. The seven-level SPWM waveform with dead time thereby is implemented with only one Digital Signal Processor (DSP) without any other attached logic circuit. The basis principle of the proposed TRM-SPWM is analyzed in detail, and the frequency spectrums of the conventional and the proposed schemes are derived and compared with each other through simulation. The DSP based implementation is presented and detailed experimental waveforms verify the accuracy and feasibility of the proposed TRM-SPWM scheme.

DSP를 이용한 3상 태양광 인버터의 SPWM 전력변환기술에 대한 연구 (A Study on the SPWM based Power Conversion Technology of the Three-Phase Photovoltaic Inverter Using DSP)

  • 김효성;유호성;이유정;정훈;고윤석
    • 한국전자통신학회논문지
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    • 제12권6호
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    • pp.1099-1106
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    • 2017
  • 본 논문에서는 신재생 에너지원인 태양광 발전을 위한 3상 인버터의 전력변환기술을 연구하였다. 태양광 인버터로는 정전압 공급 방식의 전압형 인버터, 제어기법으로는 SPWM 제어기법이 채택되었다. 태양광 인버터의 SPWM 제어기로는 강력한 고속 데이터 연산능력을 가지는 DSP가 채택되었으며, 배터리의 충전에 일정량의 전류를 공급하기 위해서 태양광 컨트롤러가 사용되었다. 끝으로, DSP를 주제어장치로 하는 소용량 3상 태양광 인버터 시스템이 시험, 제작되었으며, 실험을 통해서 SPWM 기반의 전력변환기능이 검증되었다.

A Single-Input Single-Output Approach by using Minor-Loop Voltage Feedback Compensation with Modified SPWM Technique for Three-Phase AC-DC Buck Converter

  • Alias, Azrita;Rahim, Nasrudin Abd.;Hussain, Mohamed Azlan
    • Journal of Power Electronics
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    • 제13권5호
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    • pp.829-840
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    • 2013
  • The modified sinusoidal pulse-width modulation (SPWM) is one of the PWM techniques used in three-phase AC-DC buck converters. The modified SPWM works without the current sensor (the converter is current sensorless), improves production of sinusoidal AC current, enables obtainment of near-unity power factor, and controls output voltage through modulation gain (ranging from 0 to 1). The main problem of the modified SPWM is the huge starting current and voltage (during transient) that results from a large step change from the reference voltage. When the load changes, the output voltage significantly drops (through switching losses and non-ideal converter elements). The single-input single-output (SISO) approach with minor-loop voltage feedback controller presented here overcomes this problem. This approach is created on a theoretical linear model and verified by discrete-model simulation on MATLAB/Simulink. The capability and effectiveness of the SISO approach in compensating start-up current/voltage and in achieving zero steady-state error were tested for transient cases with step-changed load and step-changed reference voltage for linear and non-linear loads. Tests were done to analyze the transient performance against various controller gains. An experiment prototype was also developed for verification.

마이크로 프로세서를 사용한 3상 VVVF 인버터에 관한 연구 (A Study on Microprocessor-Based 3-Phase VVVF Inverter)

  • 한상수;김재호;최우승
    • 대한전자공학회논문지
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    • 제27권6호
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    • pp.879-885
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    • 1990
  • The geometrical algorithm for generating a 3-phase SPWM signal for VVVF (Variable Voltage, Variable Frequency) inverter drives is proposed. In this techniques, it is suitable for micro-processor based implementation since the pulsewiths are computable in real time from simple analytic expressions. System hardware consists of the inverter circuit and the 3-phase SPWM signal generating circuit. The inverter circuit is a 3-phase SPWM signal generating circuit is single board micro-processor consisting of Z-80A CPU, EPROMXI, CTC, PIO. The method of controlling VVVF at the inverter output is discussed here.

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A UPS BASED ON A NEW SPWM GENERATOR

  • Liu, Shulin;Liu, Jian
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 1998년도 Proceedings ICPE 98 1998 International Conference on Power Electronics
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    • pp.808-812
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    • 1998
  • A new SPWM control method for Uninterrupted Power System(UPS) is presented. A triangle waveform is used as the reference signal. The desired SPWM control signal can be obtained more easily with a group of comparators. The output AC voltage can be regulated by controlling the lower reference and the upper reference of the comparators according to the feedback voltage. Basic principle, an actual circuit and the experimental results on a 500W UPS for computer system is discussed as an example.

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Multilevel Inverter to Reduce Common Mode Voltage in AC Motor Drives Using SPWM Technique

  • Renge, Mohan M.;Suryawanshi, Hiralal M.
    • Journal of Power Electronics
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    • 제11권1호
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    • pp.21-27
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    • 2011
  • In this paper, an approach to reduce common-mode voltage (CMV) at the output of multilevel inverters using a phase opposition disposed (POD) sinusoidal pulse width modulation (SPWM) technique is proposed. The SPWM technique does not require computations therefore, this technique is easy to implement on-line in digital controllers. A good tradeoff between the quality of the output voltage and the magnitude of the CMV is achieved in this paper. This paper realizes the implementation of a POD-SPWM technique to reduce CMV using a five-level diode clamped inverter for a three phase induction motor. Experimental and simulation results demonstrate the feasibility of the proposed technique.

보조부분 공진 회로를 이용한 삼상 PWM 인버터의 고조파 제거 (Elimination of harmonics in three-Phase PWM inverter using auxiliary partial resonant circuit)

  • 서기영;이현우;김영문;문상필
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1998년도 추계학술대회 논문집 학회본부A
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    • pp.137-140
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    • 1998
  • A new SPWM inverter using three-phase boost converter by auxiliary partial resonant with high power factor and high efficiency is proposed. The proposed boost converter is constructed by using a resonant network in parallel with the switch of the conventional boost converter. The devices are switched at zero voltage or zero current eliminating the switching loss. A new Partial resonant boost converter achieves zero-voltage switching (ZVS) or zero-current switching (ZCS) for all switch devices without increasing their voltage and current stresses. This paper introduces elimination of low-order harmonics compared with conventional SPWM inverter and SPWM inverter using three-phase boost converter by auxiliary Partial resonant.

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