• 한국공작기계학회:학술대회논문집
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• 한국공작기계학회 2004년도 춘계학술대회 논문집
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• pp.293-297
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• 2004

This paper is described manufacturing to jewelry by using rapid prototype. At that time, the SLC file is useful for solved generating errors to part build file. Then. we have reduced the time of manufacturing complicated three-dimensional form. Generally, it is used the STL file for rapid prototype that it is necessary to considerable time when complicated firm as jewelry generated pan build file. But the SLC file is solved to problem because it consists of configuration of a section. Neter the less, Generating Part build file hate had a lot of problem when the SLC file is used.

• 한국정밀공학회:학술대회논문집
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• 한국정밀공학회 2004년도 추계학술대회 논문집
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• pp.114-118
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• 2004

This paper is compared the build time of scanning path as to laminate height of the SLC and STL file. The STL file improve the surface roughness according to slicing height. But it have the fault spending long time to the creation of scanning path by being lower slicing height. So we proposed the SLC file to improve this fault. Therefore this paper showed to the build time of scanning path by the increase of peace using the jewellery model.

• 한국CDE학회논문집
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• 제11권6호
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• pp.440-446
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• 2006

This study relates to the effect of forming time of injection path on the total process. The whole process can be divided into build process of forming path of injection and after treatment process. The total time required for the whole process could be reduced by reducing the forming time of injection path using SLC file to correct the problems of STL file that is the basic file format for high speed molding devices. First of all, I verify the forming time of injection path according to the conditions of STL file during the formation of injection path. And I verify problems using STL file during formation of injection path. And then I tried to solve problems of STL file by comparing between the formation time of injection path and the existing method using SLC files.

• 한국정밀공학회:학술대회논문집
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• 한국정밀공학회 1995년도 춘계학술대회 논문집
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• pp.445-450
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• 1995

This paper deals with conversion from STL file to Slice cross-sectional information for Stereolithography. The STL file consist of three vertices of triangle and normal vectors in order to represent three dimension shape, but It is very difficult to convert STL file intoSlice file directly, because of file size from one Mbyte to tens of Mbytes. So, The system is accomplished data flow such as neutral.dat, .SL1, .SL2, .SL3, and .SLC file. The data processing is as follows: 1. Create a neutral file including common information. 2. Modify STL file within effective scope of SLA. 3. Calculate a point of intersection between plane equation and line equation. 4. Sort z values by increasing order. 5. Search closed loop by method of singlylinked linear list. The system is developed by using Borland C++ 3.1 compiler in the environment of Pentium PC. We get a satisfactory prototype as a result of application about a lot of household electrical appliances.

• 한국정밀공학회지
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• 제12권11호
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• pp.140-147
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• 1995

This paper deals with conversion from the STL file to the Slice to the Slice cross-sectional information for Stereolithography. The STL file is widely used for Stereolithography, but it is very difficult to convert STL file into Slice file directly. Because it consists of an ordered list of triangular net without any topological information other than the orientation of each facet. So, The system is accomplished by data flow through several intermediate stages such as Reference. SL1. .SL2L. .SL3. and .SLC file. The data processing is performed in 5 steps: 1) Create a Reference file including common information. 2) Modify STL file within the effective range of SL machine. 3) Calculate a point of intersection between plane equation and line equation. 4) Sort z values in ascending order using quick sort algorithm. 5) Search the adjacent points and formulate a closed loop usingsingly linked linear list. The system is developed by using Borland C++ 3.1 compiler in the environment of Pentium PC, and verified to be satisfactory by making some prototypes of electric household appliances.

• 전자공학회논문지
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• 제52권9호
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• pp.54-62
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• 2015

낸드 플래시 기반의 SSD (Solid-State Drive)는 HDD (Hard Disk Drive) 대비 월등한 성능에도 불구하고 쓰기 회수 제한이라는 태생적 단점을 가지고 있다. 이로 인해 SSD의 수명은 워크로드에 의해 결정되어 SSD의 기술 변화 추세인 SLC (Single Level Cell) 에서 MLC (Multi Level Cell) 로의 전환, MLC에서 TLC (Triple Level Cell) 로의 전환에 있어 큰 도전이 될 수 있다. 기존 연구들은 주로 wear-leveling 또는 하드웨어 아키텍처 측면에서 SSD의 수명 개선을 다루었으나, 본 논문에서는 호스트가 요청한 쓰기에 대해 SSD가 낸드플래시 메모리를 통해 처리하는 수명관점의 효율성을 대변하는 WAF (Write Amplification Factor) 관점에서 Host I/O 스택 중 파일 시스템, I/O 스케줄러, 링크 전력에 대해 JEDEC 엔터프라이즈 워크로드를 이용해 I/O 스택 최적 구성에 대해 실험적 분석을 수행하였다. WAF는 SSD의 FTL의 효율성을 측정하는 지표로 수명관점에서 가장 객관적으로 사용한다. I/O 스택에 대한 수명 관점의 최적 구성은 MinPower-Dead-XFS로 최대 성능 조합인 MaxPower-Cfq-Ext4에 비해 성능은 13% 감소하였지만 수명은 2.6 배 연장됨을 확인하였다. 이는 I/O 스택의 최적화 구성에 있어, SSD 성능 관점뿐만 아니라 수명 관점의 고려에 대한 유의미를 입증한다.