• Title/Summary/Keyword: SEED algorithm

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A Study on Pipeline Chip of SEED B1ock Cipher Algorithm (SEED 블록 암호 알고리즘의 파이프라인 칩 설계에 관한 연구)

  • 이규원;엄성용
    • Proceedings of the Korean Information Science Society Conference
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    • 2001.10c
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    • pp.43-45
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    • 2001
  • 본 논문에서는 한국정보보호 진흥원예서 표준으로 개발한 128비트 블록암호 알고리즘의 표준인 SEED를 하드웨어 칩으로 설계 연구하였다. 설계 연구 방법은 기존 암호 연산부의 속도 개선의 한 방법으로 암호 블록의 16 라운드 각각을 하나의 프로세서로 보고, 이를 파이프라인 방식으로 설계하여 암호 연산의 속도를 증진시키는 방법으로 설계하였다. Cadence의 NCVHDL로 Functional Simulation하고, Synopsys의 Compiler II로 Optimize된 Schematic을 검증하였다.

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An Efficient Parallelized Algorithm of SEED Block Cipher on Cell BE (CELL 프로세서를 이용한 SEED 블록 암호화 알고리즘의 효율적인 병렬화 기법)

  • Kim, Deok-Ho;Yi, Jae-Young;Ro, Won-Woo
    • The KIPS Transactions:PartA
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    • v.17A no.6
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    • pp.275-280
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    • 2010
  • In this paper, we discuss and propose an efficiently parallelized block cipher algorithm on the CELL BE processor. With considering the heterogeneous feature of the CELL BE architecture, we apply different encoding/decoding methods to PPE and SPE and improve the throughput. Our implementation was fully tested, with execution results showing achievement of high throughput, capable of supporting as high network speed as 2.59 Gbps. Compared to various parallel implementations on multi-core systems, our approach provides speedup of 1.34 in terms of encoding/decoding speed.

Design of Cryptographic Coprocessor for SEED Algorithm (SEED 알고리즘용 암호 보조 프로세서의 설계)

  • 최병윤
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.25 no.9B
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    • pp.1609-1617
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    • 2000
  • In this paper a design of cryptographic coprocessor which implements SEED algorithm is described. To satisfy trade-off between area and speed, the coprocessor has structure in which 1 round operation is divided into three subrounds and then subround is executed for one clock. To improve clock frequency online precomputation scheme for round key is used. To apply the coprocessor to various applications, four operating modes such as ECB, CBC, CFB, and OFB are supported. Also to eliminate performance degradation due to data input and data output time between host computer and coprocesor, background input/output method is used. The cryptographic coprocessor is designed using $0.25{\mu}{\textrm}{m}$ CMOS technology and consists of about 29,300 gates. Its peak performance is about 237 Mbps encryption or decryption rate under 100 Mhz clock frequncy and ECB mode.

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Smart Door Lock Systems using encryption technology (암호화 기법을 활용한 사물인터넷 기반의 스마트 도어락 시스템)

  • Lee, Sung-Won;Park, Seung-Min;Sim, Kwee-Bo
    • Journal of the Korean Institute of Intelligent Systems
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    • v.27 no.1
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    • pp.65-71
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    • 2017
  • Since existing Internet of Things(IoT) is vulnerable, it may cause property damage due to the information leakage. Especially, the smart door lock system built on the IoT can cause more damage. To solve these problems, this paper classify the data generated by the sensor according to the condition and send an alarm message to the user's smartphone through Google Cloud Message (GCM). We made it possible to check the images in real time through the smartphone application and control the door lock using the TCP / IP protocol. Also, we applied OTP-Based Matrix SEED algorithm to door lock system to improve security.

Rate-Distortion Based Segmentation of Tumor Region in an Breast Ultrasound Volume Image (유방 초음파 볼륨영상에서의 율왜곡 기반 종양영역 분할)

  • Kwak, Jong-In;Kim, Sang-Hyun;Kim, Nam-Chul
    • Journal of the Institute of Electronics Engineers of Korea SC
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    • v.42 no.5 s.305
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    • pp.51-58
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    • 2005
  • This paper proposes an efficient algorithm for extracting a tumor region from an breast ultrasound volume image by using rate-distortion (R-D) based seeded region growing. In the proposed algorithm the rate and the distortion represent the roughness of the contour and the dissimilarity of pixels in a region, respectively. Staring from an initial seed region set in each cutting plane of a volume, a pair of the seed region and one of adjacent regions whose R-D cost is minimal is searched and then they are merged into a new updated seed region. This procedure is recursively performed until the averaged R-D cost values per the number of contour pixels in the seed region becomes maxim. As a result, the final seed region has good pixel homogeneity and a much smooth contour. Finally, the tumor volume is extracted using the contours of the final seed regions in all the cutting planes. Experimental results show that the averaged error rate of the proposed method is shown to be below 4%.

Detection and Recognition of Illegally Parked Vehicles Based on an Adaptive Gaussian Mixture Model and a Seed Fill Algorithm

  • Sarker, Md. Mostafa Kamal;Weihua, Cai;Song, Moon Kyou
    • Journal of information and communication convergence engineering
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    • v.13 no.3
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    • pp.197-204
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    • 2015
  • In this paper, we present an algorithm for the detection of illegally parked vehicles based on a combination of some image processing algorithms. A digital camera is fixed in the illegal parking region to capture the video frames. An adaptive Gaussian mixture model (GMM) is used for background subtraction in a complex environment to identify the regions of moving objects in our test video. Stationary objects are detected by using the pixel-level features in time sequences. A stationary vehicle is detected by using the local features of the object, and thus, information about illegally parked vehicles is successfully obtained. An automatic alarm system can be utilized according to the different regulations of different illegal parking regions. The results of this study obtained using a test video sequence of a real-time traffic scene show that the proposed method is effective.

Design of a Cryptographic Processor Dedicated to VPN (VPN에 특화된 암호가속 칩의 설계 및 제작)

  • Lee, Wan-Bok;Roh, Chang-Hyun
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • v.9 no.2
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    • pp.852-855
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    • 2005
  • This paper introduces a case study of designing a cryptographic processor dedicated to VPN/SSL system. The designed processor supports not only block cipher algorithm, including 3DES, AES, and SEED, but also 163 bit ECC public key crypto algorithm. Moreover, we adopted PCI Master interface in the design, which guarantees fast computation of cryptographic algorithm prevalent in general information security systems.

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Implementation of a High Performance SEED Processor for Smart Card Applications (스마트카드용 고성능 SEED 프로세서의 구현)

  • 최홍묵;최명렬
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.14 no.5
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    • pp.37-47
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    • 2004
  • The security of personal informations has been an important issue since the field of smart card applications has been expanded explosively. The security of smart card is based on cryptographic algorithms, which are highly required to be implemented into hardware for higher speed and stronger security. In this paper, a SEED cryptographic processor is designed by employing one round key generation block which generates 16 round keys without key registers and one round function block which is used iteratively. Both the round key generation block and the F function are using only one G function block with one 5${\times}$l MUX sequentially instead of 5 G function blocks. The proposed SEED processor has been implemented such that each round operation is divided into seven sub-rounds and each sub-round is executed per clock. Functional simulation of the proposed cryptographic processor has been executed using the test vectors which are offered by Korea Information Security Agency. In addition, we have evaluated the proposed SEED processor by executing VHDL synthesis and FPGA board test. The die area of the proposed SEED processor decreases up to approximately 40% compared with the conventional processor.

A Study on the OTP Generation Algorithm for User Authentication (사용자 인증에 적합한 OTP 생성 알고리즘에 관한 연구)

  • Kim, Dong-Ryool
    • Journal of Digital Convergence
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    • v.13 no.1
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    • pp.283-288
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    • 2015
  • A disposable password is necessary to avoid any danger by the use of a static password and reinforce the user's authentication. In order to prevent personal information from being exposed, OTP generation algorithm is regarded as important. The OTP generation algorithm we suggest in this thesis generates 256-bit-size OTP Data by using Seed value and Time value. This value that the generated OTP Data are arranged with a matrix and a 32-bit-value is extracted on an irregular basis becomes the final value. We can find out that the more OTP generation frequency we have, the lower probability of clash tolerance we get in our suggested algorithm, compared to the previous algorithm.

Design of modified Feistel structure for high-capacity and high speed achievement (대용량 고속화 수행을 위한 변형된 Feistel 구조 설계에 관한 연구)

  • Lee Seon-Keun;Jung Woo-Yeol
    • Journal of the Korea Society of Computer and Information
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    • v.10 no.3 s.35
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    • pp.183-188
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    • 2005
  • Parallel processing in block cryptographic algorithm is difficult, because Feistel structure that is basis structure of block cryptographic algorithm is sequential processing structure. Therefore this paper changes these sequential processing structure and Feistel structure made parallel processing to be possible. This paper that apply this modified structure designed DES that have parallel Feistel structure. Proposed parallel Feistel structure could prove greatly block cryptographic algorithm's performance such as DES and so on that could not but have trade-off relation the data processing speed and data security interval because block cryptographic algorithm can not use pipeline method because of itself structural problem. Therefore, modified Feistel structure is going to display more superior security function and processing ability of high speed than now in case apply way that is proposed to SEED, AES's Rijndael, Twofish etc. that apply Feistel structure.

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