• Title/Summary/Keyword: S.E.R.I. operation

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Development of a Power Control Unit for CRDM (다기능을 가진 제어봉 구동장치 전력제어기 개발)

  • Kim, C.K.;Park, M.K.;Kim, S.J.;Lee, J.M.;Kweon, S.M.;Nam, J.H.
    • Proceedings of the KIEE Conference
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    • 2003.07d
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    • pp.2215-2217
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    • 2003
  • In this paper we describe a Control Rod Control System(CRCS) with the various functions for the test and operation of Control Rod Drive Mechanism(CRDM). The CRCS controls the motion of the full length rod drive mechanisms in response to signals from the Reactor Operator and the Reactor Regulating System. The mechanisms are grouped and identified as being for either Shutdown Banks or Control Banks. The CRCS also provides information regarding rod motion, rod position, and status of the Rod Control System. Also we have implemented the diverse functions in the developed CRCS. Due to the developed CRCS, we are assured that the commercial operation by this system be made before long.

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Modeling of Hanlim's gas turbine generator & qualitative analysis of PSS operation (한림가스터빈 발전기/제어계의 모델링 및 PSS 동작의 정성적 분석)

  • Choi, K.S.;Moon, Y.H.;Kim, D.J.;Choo, J.B.;Lyu, S.H.
    • Proceedings of the KIEE Conference
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    • 1996.11a
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    • pp.95-98
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    • 1996
  • Response speed of generator/control system kas increased with the aid of the development of power electronics. Even though it is desirable to enhance response speed for the control system(AVR/Gov) of generator itself, in case a certain generator/control system with high response excitation system is connected with bulk power system, terminal voltage and active power of some generators can oscillate with adjoining generators or near area when even a little of disturbance take place. PSS(Power System Stabilizer) is used to damp rotor swing by adding the supplementary signal in phase with speed. As the stable AVR response is very important before PSS is installed, modeling and analysis of generator/control system was performed. Next we have analysed PSS response of Hanlim's gas turbine by transmission line open/close test.

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Treatment of Bunionette Deformity with S.E.R.I. (simple, effective, rapid, inexpensive) Operation (S.E.R.I. 수술법을 이용한 소건막류의 치료)

  • Kim, Sun-Yong;Park, Kwang-Hwan;Lee, Jin-Woo
    • Journal of Korean Foot and Ankle Society
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    • v.14 no.1
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    • pp.25-30
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    • 2010
  • Purpose: The purpose of this study was to evaluate the clinical and radiological outcomes of the S.E.R.I. (simple, effective, rapid, inexpensive) operation for the bunionette deformity. Materials and Methods: Between March 2005 and February 2009, 22 patients (26 feet) who had been treated for the bunionette deformity with minimally invasive osteotomy were reviewed retrospectively. Clinically, Visual Analogue Scale (VAS), American Orthopaedic Foot and Ankle Society (AOFAS) score, shoes selectivity, disappearance of callus and patient's satisfaction level by Coughlin scoring system were evaluated. Radiologically, the bunionette was classified as four types according to the Fallat classification. The 4-5$^{th}$ intermetatarsal angle (4-5$^{th}$ IMA), the 5$^{th}$ metatarsophalangeal angle (5$^{th}$ MPA) and the length of 5th metatarsal bone (5$^{th}$ MTL) were analyzed at preoperatively and at final follow up visit. Results: VAS improved from $6.8{\pm}1.8$ points to $2.2{\pm}1.8$ points (p<0.05). AOFAS score improved from $54.0{\pm}14.2$ points to $90.0{\pm}4.8$ points (p<0.05). There was no change in shoes selectivity. 9 feet (34.6%) were satisfied with excellent results, 16 feet (61.5%) with good results and 1 foot (3.9%) with fair results. The average 4-5$^{th}$ IMA was corrected from $10.1{\pm}2.3^{\circ}$ to $4.4{\pm}1.7^{\circ}$ (p<0.05). The average 5$^{th}$ MPA was corrected from $11.5{\pm}8.6^{\circ}$ to $-0.1{\pm}4.1^{\circ}$ (p<0.05). The average 5$^{th}$ MTL was changed from $66.1{\pm}4.3$ millimeters to $64.1{\pm}4.4$ millimeters (p=0.069). There was no malunion, nonunion or delayed union and other perioperative complications. Conclusion: S.E.R.I. operation is less invasive and easy technique. This procedure is recommendable for the treatment of the bunionette deformity.

A Variable Latency Goldschmidt's Floating Point Number Square Root Computation (가변 시간 골드스미트 부동소수점 제곱근 계산기)

  • Kim, Sung-Gi;Song, Hong-Bok;Cho, Gyeong-Yeon
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.9 no.1
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    • pp.188-198
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    • 2005
  • The Goldschmidt iterative algorithm for finding a floating point square root calculated it by performing a fixed number of multiplications. In this paper, a variable latency Goldschmidt's square root algorithm is proposed, that performs multiplications a variable number of times until the error becomes smaller than a given value. To find the square root of a floating point number F, the algorithm repeats the following operations: $R_i=\frac{3-e_r-X_i}{2},\;X_{i+1}=X_i{\times}R^2_i,\;Y_{i+1}=Y_i{\times}R_i,\;i{\in}\{{0,1,2,{\ldots},n-1} }}'$with the initial value is $'\;X_0=Y_0=T^2{\times}F,\;T=\frac{1}{\sqrt {F}}+e_t\;'$. The bits to the right of p fractional bits in intermediate multiplication results are truncated, and this truncation error is less than $'e_r=2^{-p}'$. The value of p is 28 for the single precision floating point, and 58 for the doubel precision floating point. Let $'X_i=1{\pm}e_i'$, there is $'\;X_{i+1}=1-e_{i+1},\;where\;'\;e_{i+1}<\frac{3e^2_i}{4}{\mp}\frac{e^3_i}{4}+4e_{r}'$. If '|X_i-1|<2^{\frac{-p+2}{2}}\;'$ is true, $'\;e_{i+1}<8e_r\;'$ is less than the smallest number which is representable by floating point number. So, $\sqrt{F}$ is approximate to $'\;\frac{Y_{i+1}}{T}\;'$. Since the number of multiplications performed by the proposed algorithm is dependent on the input values, the average number of multiplications per an operation is derived from many reciprocal square root tables ($T=\frac{1}{\sqrt{F}}+e_i$) with varying sizes. The superiority of this algorithm is proved by comparing this average number with the fixed number of multiplications of the conventional algorithm. Since the proposed algorithm only performs the multiplications until the error gets smaller than a given value, it can be used to improve the performance of a square root unit. Also, it can be used to construct optimized approximate reciprocal square root tables. The results of this paper can be applied to many areas that utilize floating point numbers, such as digital signal processing, computer graphics, multimedia, scientific computing, etc.

A Variable Latency Goldschmidt's Floating Point Number Divider (가변 시간 골드스미트 부동소수점 나눗셈기)

  • Kim Sung-Gi;Song Hong-Bok;Cho Gyeong-Yeon
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.9 no.2
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    • pp.380-389
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    • 2005
  • The Goldschmidt iterative algorithm for a floating point divide calculates it by performing a fixed number of multiplications. In this paper, a variable latency Goldschmidt's divide algorithm is proposed, that performs multiplications a variable number of times until the error becomes smaller than a given value. To calculate a floating point divide '$\frac{N}{F}$', multifly '$T=\frac{1}{F}+e_t$' to the denominator and the nominator, then it becomes ’$\frac{TN}{TF}=\frac{N_0}{F_0}$'. And the algorithm repeats the following operations: ’$R_i=(2-e_r-F_i),\;N_{i+1}=N_i{\ast}R_i,\;F_{i+1}=F_i{\ast}R_i$, i$\in${0,1,...n-1}'. The bits to the right of p fractional bits in intermediate multiplication results are truncated, and this truncation error is less than ‘$e_r=2^{-p}$'. The value of p is 29 for the single precision floating point, and 59 for the double precision floating point. Let ’$F_i=1+e_i$', there is $F_{i+1}=1-e_{i+1},\;e_{i+1}',\;where\;e_{i+1}, If '$[F_i-1]<2^{\frac{-p+3}{2}}$ is true, ’$e_{i+1}<16e_r$' is less than the smallest number which is representable by floating point number. So, ‘$N_{i+1}$ is approximate to ‘$\frac{N}{F}$'. Since the number of multiplications performed by the proposed algorithm is dependent on the input values, the average number of multiplications per an operation is derived from many reciprocal tables ($T=\frac{1}{F}+e_t$) with varying sizes. 1'he superiority of this algorithm is proved by comparing this average number with the fixed number of multiplications of the conventional algorithm. Since the proposed algorithm only performs the multiplications until the error gets smaller than a given value, it can be used to improve the performance of a divider. Also, it can be used to construct optimized approximate reciprocal tables. The results of this paper can be applied to many areas that utilize floating point numbers, such as digital signal processing, computer graphics, multimedia, scientific computing, etc

A Variable Latency Newton-Raphson's Floating Point Number Reciprocal Square Root Computation (가변 시간 뉴톤-랍손 부동소수점 역수 제곱근 계산기)

  • Kim Sung-Gi;Cho Gyeong-Yeon
    • The KIPS Transactions:PartA
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    • v.12A no.5 s.95
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    • pp.413-420
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    • 2005
  • The Newton-Raphson iterative algorithm for finding a floating point reciprocal square mot calculates it by performing a fixed number of multiplications. In this paper, a variable latency Newton-Raphson's reciprocal square root algorithm is proposed that performs multiplications a variable number of times until the error becomes smaller than a given value. To find the rediprocal square root of a floating point number F, the algorithm repeats the following operations: '$X_{i+1}=\frac{{X_i}(3-e_r-{FX_i}^2)}{2}$, $i\in{0,1,2,{\ldots}n-1}$' with the initial value is '$X_0=\frac{1}{\sqrt{F}}{\pm}e_0$'. The bits to the right of p fractional bits in intermediate multiplication results are truncated and this truncation error is less than '$e_r=2^{-p}$'. The value of p is 28 for the single precision floating point, and 58 for the double precision floating point. Let '$X_i=\frac{1}{\sqrt{F}}{\pm}e_i$, there is '$X_{i+1}=\frac{1}{\sqrt{F}}-e_{i+1}$, where '$e_{i+1}{<}\frac{3{\sqrt{F}}{{e_i}^2}}{2}{\mp}\frac{{Fe_i}^3}{2}+2e_r$'. If '$|\frac{\sqrt{3-e_r-{FX_i}^2}}{2}-1|<2^{\frac{\sqrt{-p}{2}}}$' is true, '$e_{i+1}<8e_r$' is less than the smallest number which is representable by floating point number. So, $X_{i+1}$ is approximate to '$\frac{1}{\sqrt{F}}$. Since the number of multiplications performed by the proposed algorithm is dependent on the input values, the average number of multiplications Per an operation is derived from many reciprocal square root tables ($X_0=\frac{1}{\sqrt{F}}{\pm}e_0$) with varying sizes. The superiority of this algorithm is proved by comparing this average number with the fixed number of multiplications of the conventional algorithm. Since the proposed algorithm only performs the multiplications until the error gets smaller than a given value, it can be used to improve the performance of a reciprocal square root unit. Also, it can be used to construct optimized approximate reciprocal square root tables. The results of this paper can be applied to many areas that utilize floating point numbers, such as digital signal processing, computer graphics, multimedia, scientific computing, etc.

A Variable Latency Newton-Raphson's Floating Point Number Reciprocal Computation (가변 시간 뉴톤-랍손 부동소수점 역수 계산기)

  • Kim Sung-Gi;Cho Gyeong-Yeon
    • The KIPS Transactions:PartA
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    • v.12A no.2 s.92
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    • pp.95-102
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    • 2005
  • The Newton-Raphson iterative algorithm for finding a floating point reciprocal which is widely used for a floating point division, calculates the reciprocal by performing a fixed number of multiplications. In this paper, a variable latency Newton-Raphson's reciprocal algorithm is proposed that performs multiplications a variable number of times until the error becomes smaller than a given value. To find the reciprocal of a floating point number F, the algorithm repeats the following operations: '$'X_{i+1}=X=X_i*(2-e_r-F*X_i),\;i\in\{0,\;1,\;2,...n-1\}'$ with the initial value $'X_0=\frac{1}{F}{\pm}e_0'$. The bits to the right of p fractional bits in intermediate multiplication results are truncated, and this truncation error is less than $'e_r=2^{-p}'$. The value of p is 27 for the single precision floating point, and 57 for the double precision floating point. Let $'X_i=\frac{1}{F}+e_i{'}$, these is $'X_{i+1}=\frac{1}{F}-e_{i+1},\;where\;{'}e_{i+1}, is less than the smallest number which is representable by floating point number. So, $X_{i+1}$ is approximate to $'\frac{1}{F}{'}$. Since the number of multiplications performed by the proposed algorithm is dependent on the input values, the average number of multiplications per an operation is derived from many reciprocal tables $(X_0=\frac{1}{F}{\pm}e_0)$ with varying sizes. The superiority of this algorithm is proved by comparing this average number with the fixed number of multiplications of the conventional algorithm. Since the proposed algorithm only performs the multiplications until the error gets smaller than a given value, it can be used to improve the performance of a reciprocal unit. Also, it can be used to construct optimized approximate reciprocal tables. The results of this paper can be applied to many areas that utilize floating point numbers, such as digital signal processing, computer graphics, multimedia scientific computing, etc.

A Study On BLDC Motor Control by Using I-P Algorithm (외란에 강인한 I-P제어 기법의 BLDC 모터에 관한 연구)

  • Han, S.Y.;Baek, S.H.;Kim, J.P.;Kim, Y.;Jung, I.R.
    • Proceedings of the KIEE Conference
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    • 2000.07b
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    • pp.997-999
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    • 2000
  • BLDC Motor has many advantages for control. This paper presents to perform constant speed against disturbance during operation. BLDC motor control used I-P algorithm to have fast response, reliable stability and robust response. In this paper I-P algorithm applied to 50W BLDC Motor According to results, I-P algorithm characteristics is confirmed.

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Studying the operation of MOSFET RC-phase shift oscillator under different environmental conditions

  • Ibrahim, Reiham O.;Abd El-Azeem, S.M.;El-Ghanam, S.M.;Soliman, F.A.S.
    • Nuclear Engineering and Technology
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    • v.52 no.8
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    • pp.1764-1770
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    • 2020
  • The present work was mainly concerned with studying the operation of RC-phase shift oscillator based on MOSFET type 2N6660 under the influence of different temperature levels ranging from room temperature (25 ℃) up-to135 ℃ and gamma-irradiation up-to 3.5 kGy. In this concern, both the static (I-V) characteristic curves of MOSFET devices and the output signal of the proposed oscillator were recorded under ascending levels of both temperature and gamma-irradiation. From which, it is clearly shown that the drain current was decreased from 0.22 A, measured at 25 ℃, down to 0.163 A, at 135 ℃. On the other hand, its value was increased up-to 0.49 A, whenever the device was exposed to gamma-rays dose of 3.5 kGy. Considering RC-phase shift oscillator, the oscillation frequency and output pk-pk voltage were decreased whenever MOSFET device exposed to gamma radiation by ratio 54.9 and 91%, respectively. While, whenever MOSFET device exposed to temperature the previously mentioned parameters were shown to be decreased by ratio 2.07 and 46.2%.