• 전기학회논문지
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• 제58권10호
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• pp.1930-1935
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• 2009

This paper deals with the torque ripple reduction of permanent magnet synchronous motor using harmonic current injection. Torque ripple of electric motor reduces system stability and performances, therefore efforts to reduce torque ripple are exerted in the design process. Torque ripple can be reduced by appropriate pole/slot combination, skew of rotor or stator, design of magnetic circuit, etc. In addition, torque ripple can be also reduced by input voltage and current, and many researches have been conducted to reduce torque ripple for six-step drive. Torque ripple reduction for current vector controlled permanent magnet synchronous motor also have been conducted and verified by investigating back emf wave form. Torque ripple reduction in this paper started from getting torque profile according to input current and electrical angle calculated by FEA, then instantaneous currents at each electrical angles for constant torque are calculated and applied to experiments. Therefore, 0% of torque ripple can be obtained theoretically with harmonic current injection. In order to maximize the effect of torque ripple reduction, a BLDC motor having high harmonic component of back emf is chosen. With sinusoidal current drive, over 100% of torque ripple is obtained initially, then 0.5 % of torque ripple is obtained by FEA using harmonic current injection. The effect is verified by experiment and the presented method can be effectively applicable to Electric Power Steering(EPS).

• 전력전자학회논문지
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• 제12권3호
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• pp.191-198
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• 2007

소형 BLDC(Brushless DC) 전동기는 높은 운전효율과 고토크 특성으로 인하여, 산업용 기계와 가전기기 및 특히 의료용 장비에 널리 사용되고 있다. 일반적인 BLDC 전동기의 경우에 전류(commutation) 구간에서의 토크 리플 억제에 대한 다양한 연구가 이루어져 왔다. 하지만, 초고속 BLDC 전동기의 경우 설계 특성상 전기적 시정수가 매우 짧아서 전류 구간에서의 토크 리플 보다 통전 구간에서의 토크 리플이 더 큰 영향을 미치게 된다. 본 논문에서는 40000rpm급 초고속 소형 BLDC 전동기의 전기적 시상수에 따른 통전구간에서의 토크리플을 해석하고, 토크 리플 억제를 위하여, 순시 전압 제어기와 고속 히스테리시스 전류 제어기를 제안한다. 제안된 순시 전압제어기는 통전구간에서의 토크 리플 억제를 위하여 운전속도와 부하전류에 적합한 전압을 순시적으로 제어하여 BLDC 전동기에 공급하고, 고속 히스테리시스 전류 제어기는 DSP의 지령전류에 따라, 제어 주기의 샘플링 지연없이 부하전류를 제어하는 시스템이다. 제안된 초고속 소형 BLDC 전동기의 토크 리플 억제를 위한 제어 시스템은 시뮬레이션 및 실험을 통하여 그 타당성을 증명하였다.

• Journal of Electrical Engineering and Technology
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• 제11권1호
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• pp.109-116
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• 2016

This paper proposes an analytic model for four-switch inverter (FSI)-driven wye (Y) or delta (Δ)-connected motors with a current ripple reduction algorithm. FSIs employ four switches in controlling three-phase load instead of using six switches. They have split dc-link stage, and due to this inherent structure there exists the voltage difference between upper and lower capacitors, which results in distortion of the inverter output voltage. To study characteristics of FSIs, this paper presents an advanced simulation models of FSI-driven control system for 3-phase motor that can has a wire connection either Y or Δ. In addition, this paper introduces a current ripple reduction scheme that mitigates degradation of control performance due to the voltage difference between the dc-link capacitors. The validity of the proposed method and the analytic model is verified by simulations and experiments carried out with 1-HP induction machine with Y or Δ-connection

• 전력전자학회논문지
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• 제3권4호
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• pp.280-286
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• 1998

본 논문에서는 벡터제어방식의 인버터에 의하여 구동되는 교류전동기 제어 시스템에서 전류특정회로에서의 측정오차에 기인하는 전동기의 토크리플을 저감하는 방법을 제안한다. 2상의 전류를 측정하는 회로에서의 오프셋 전압과 전압증폭률이 서로 다를 때 전동기 출력토크에 발생되는 리플을 각각 정량적으로 분석하고, 이로부터 온라인 상태에서 실시간으로 토크리플을 제거할 수 있는 알고리즘을 제시하였다. 제안된 방식의 유용성을 확인하기 위하여 이를 영구자석형 동기전동기에 적용하였을 경우에 대하여 출력토크의 리플을 계산하고 이를 제거하는 알고리즘을 컴퓨터로 시뮬레이션하였다.

• 전력전자학회논문지
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• 제17권2호
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• pp.182-189
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• 2012

In this paper, the input current and output voltage ripple of the soft switching interleaved boost converter was analyzed. Ripples of input current and output voltage with an interleaved method is analysed and as a result, the facts that it has lower ripple current than conventional interleaved method is verified. it means that a capacity of a main inductor can be reduced. Besides, a low capacitance of capacitor which means high lifetime and confidence can be used because of reducing ripples of output voltage. In order to verify the validity of the proposed converter used 10uF film capacitor, experiment was performed, and the efficiency of the proposed converter was measured with variable load and duty conditions.

• Journal of Power Electronics
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• 제15권2호
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• pp.327-337
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• 2015

This study discusses the design of a parallel-operated DC-DC single-ended primary-inductor converter (SEPIC) for low-voltage application and current sharing with a constant output voltage. A coupled inductor is used for parallel-connected SEPIC topology. Generally, two separate inductors require different ripple currents, but a coupled inductor has the advantage of using the same ripple current. Furthermore, tightly coupled inductors require only half of the ripple current that separate inductors use. In this proposed work, tightly coupled inductors are used. These produce an output that is more efficient than that from separate inductors. Two SEPICs are also connected in parallel using the coupled inductors with a single common controller. An analog control circuit is designed to generate pulse width modulation (PWM) signals and to fulfill the closed-loop control function. A stable output current-sharing strategy is proposed in this system. An experimental setup is developed for a 18.5 V, 60 W parallel SEPIC (PSEPIC) converter, and the results are verified. Results indicate that the PSEPIC provides good response for the variation of input voltage and sudden change in load.

• 전기학회논문지
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• 제58권12호
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• pp.2391-2395
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• 2009

Active control schemes which modify the excitation to correct for any of the nonideal characteristics of the SPMSM is described. Especially, because of design limitations(size and cost) in automobile, the back-EMF of SPMSM can't be perfectly designed with sinusoidal wave and iron core of stator is saturated so that torque ripple is unavoidable. An active cancellation method of the pulsating torque components which would otherwise be generated using the classic sinusoidal current excitation is illustrated.

• 전력전자학회:학술대회논문집
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• 전력전자학회 1998년도 전력전자학술대회 논문집
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• pp.337-341
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• 1998

Brushless DC motors have trapezoidal back emf waveform. Generally, because it is drived by a voltage source inverter, the ideal rectangular phase current is not available and therefore produce torque ripple. In this paper, the torque ripple due to commutation is analysed and the practical method that can reduce the torque ripple is proposed. Simulation and experimental results show the effectiveness of the proposed method.

• 전력전자학회논문지
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• 제17권1호
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• pp.8-13
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• 2012

DSTATCOM is active filter that reduces nonlinear and unbalanced currents. Researches about DSTATCOM are mainly divided two parts, one is the reference value calculation of compensation current depending on the calculation of the load-side average active power and dc-link capacitor average voltage, the other part is actual current control depending on the reference value of compensation current. This paper proposes a calculation of dc-link capacitor average voltage ripple voltage extraction instead of conventional method using LPF. The utility of the proposed algorithm is verified through the theoretical analysis and the experiment under unbalance loads and non-linear load.

• 한국정밀공학회:학술대회논문집
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• 한국정밀공학회 2005년도 춘계학술대회 논문집
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• pp.1455-1458
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• 2005

This paper presents the method of reducing torque ripple of Blushless Direct Current(BLDC) motor. In the BLDC motor, the torque is decided by the back-EMF and current waveform. If the back-EMF is constant, the torque ripple depends on the current ripple during commutation period. The current in commutation period is acquired by circuit analysis and then the torque ripple simply can be reduced by varying input voltage to flow the current continuously. And suggested method is confirmed by dynamic with parameters of 500W BLDC motor.