• Title/Summary/Keyword: Reverse Channel

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Flow Structure of the Wake behind an Elliptic Cylinder Close to a Free Surface

  • Daichin;Lee, Sang-Joon
    • Journal of Mechanical Science and Technology
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    • v.15 no.12
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    • pp.1784-1793
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    • 2001
  • The flow fields around an elliptic cylinder of axis ratio AR=2 adjacent to a free surface were investigated experimentally using a water channel. The main objective is to understand the effect of the free surface on the flow structure in the near-wake. The flow fields were measured by varying the depth of cylinder submergence, for each experimental condition, 350 velocity fields were measured using a single-frame PIV system and ensemble-averaged to obtain the spatial distribution of turbulent statics. For small submergence depths a large-scale eddy structure was observed in the near-wake, causing a reverse flow near the free surface, downstream of the cylinder. As the depth of cylinder submergence was increased, the flow speed in the gap region between the upper surface of the cylinder and the free surface increased and formed a substantial jet flow. The general flow structure of the elliptic cylinder is similar to previous results for a circular cylinder submerged near to a free surface. However, the width of the wake and the angle of downward deflection of the shear layer developed from the lower surface of the elliptic cylinder are smaller tan those for a circular cylinder.

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Effects of a Flow Guide on the Arcing History in a Thermal Puffer Plasma Chamber (유동 가이드가 열파퍼 플라즈마 챔버의 아크현상 이력에 미치는 영향)

  • Lee, Jong-Chul;Kim, Youn-Jea
    • Transactions of the Korean Society of Mechanical Engineers B
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    • v.31 no.10
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    • pp.832-839
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    • 2007
  • The geometry and dimensions of an expansion chamber are decisive factors in thermal puffer plasma chamber designs. Because they together dominate the temperature and speed at which the cooling gas from the chamber flows back through a flow channel to the arcing zone for the successful interruption of fault currents. In this study, we calculated the flow and mass transfer driven by arc plasma, and investigated the effects of a flow guide installed inside a thermal puffer plasma chamber. It is found that the existing cold gas of the chamber mixes with hot gases entrained from the arcing zone and is subjected to compression due to pressure build-up in the chamber. The pressure build-up with the flow guide is larger than that without due to a vortex which rotates clockwise around the chamber center. By the reverse pressure gradient, the mixing gas of the chamber flows back out for cooling down the residual plasma near current zero. In the case with the flow guide, the temperature just before current zero is lower than that without, and the Cu concentration with high electrical conductivity is also less than that without the flow guide.

A Study on the Algorithm for the Q-CDMA Base Station Receiver (Q-CDMA 기지국 수신기 알고리즘 연구)

  • 이태영;김환우
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.19 no.9
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    • pp.1812-1823
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    • 1994
  • In this paper, we focus on the simulation of receiver algorithms for the Q-CDMA reverse link modem to analyze its structure and performance. Receiver algorithm is to be characterized by processing a large amount of data for reliable data transmission through poor mobile channel environment. According to Q-CDMA receiver scheme, we connect the code acqusition and code tracking models for despreading of input signals and the RAKE structure demodulator used to resolve the time diversity signal due to multipath propagation. And this connected system is under test. The bit error rates are found for an arbitrary user under the AWGN and multipath fading environments.

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Design of Chip Set for CDMA Mobile Station

  • Yeon, Kwang-Il;Yoo, Ha-Young;Kim, Kyung-Soo
    • ETRI Journal
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    • v.19 no.3
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    • pp.228-241
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    • 1997
  • In this paper, we present a design of modem and vocoder digital signal processor (DSP) chips for CDMA mobile station. The modem chip integrates CDMA reverse link modulator, CDMA forward link demodulator and Viterbi decoder. This chip contains 89,000 gates and 29 kbit RAMs, and the chip size is $10 mm{\times}10.1 mm$ which is fabricated using a $0.8{\mu}m$ 2 metal CMOs technology. To carry out the system-level simulation, models of the base station modulator, the fading channel, the automatic gain control loop, and the microcontroller were developed and interfaced with a gate-level description of the modem application specific integrated circuit (ASIC). The Modem chip is now successfully working in the real CDMA mobile station on its first fab-out. A new DSP architecture was designed to implement the Qualcomm code exited linear prediction (QCELP) vocoder algorithm in an efficient way. The 16 bit vocoder DSP chip has an architecture which supports direct and immediate addressing modes in one instruction cycle, combined with a RISC-type instruction set. This turns out to be effective for the implementation of vocoder algorithm in terms of performance and power consumption. The implementation of QCELP algorithm in our DSP requires only 28 million instruction per second (MIPS) of computation and 290 mW of power consumption. The DSP chip contains 32,000 gates, 32K ($2k{\times}16\;bit$) RAM, and 240k ($10k{\times}24\;bit$) ROM. The die size is $8.7\;mm{\times}8.3\;mm$ and chip is fabricated using $0.8\;{\mu}m$ CMOS technology.

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Performance Analysis of a Baseband Noncoherent Code Tracking Loop for DS-CDMA Systems (CDMA 시스템용 기저 대역 비동기식 동기 추적 회로의 성능 분석)

  • 이경준;박형래;채수환
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.8 no.6
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    • pp.645-655
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    • 1997
  • In this paper, the performance of the noncoherent code tracking loop designed at baseband for CDMA applications is analyzed in detail and is confirmed by computer simulations. Analytical closed-form formula for jitter variance is derived for AWGN channel environments as a function of pulse shaping filter, timing offset, signal-to-interference ratio, and loop filter coefficients. The design issue of the loop filter is also addressed with emphasis on the second-order tracking loop. Finally, the performance of the designed tracking loop is examined by computer simulations for both AWGN and Rayleigh fading channels, when applied to the reverse link of the coherent CDMA system for IMT-2000 designed by ETRI.

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A Study on Optimization of W-CDMA System Reverse Link Power Ratio using Multiple Access Interference Cancellation (역방향 채널 전력비에 따른 IMT-2000용 비동기 W-CDMA 시스템의 성능 분석)

  • 강명구;조장묵;진용옥
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.4 no.1
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    • pp.227-232
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    • 2000
  • This study applied asynchronous W-CDMA(3GPP) system that is suggested as an access method of IMT-2000, multimedia communication in next generation, and estimated fading channel by using pilot symbol different from traditional IS-95. And then, it applied PIC(Parallel Interference Cancellation) as multiple access interference cancellation and analyzed performance depending on the power rate between DPCCH(Control) and DPDCH(Data). As a result of simulation, it showed the best performance in C:D = 3:7 and 4:6, where set up as five users in case of hand design, and showed the best performance in C:D = 3:7, where did as ten users.

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Performance Analysis of Soft Handoff Region Ratio in CDMA System Considering System Capacity and Traffic Load (CDMA망에서 시스템 용량과 트래픽 부하의 변화를 반영한 핸드오프 영역 비율에 대한 성능분석)

  • Jung, Sung-Hwan;Hong, Jung-Wan;Lee, Sang-Cheon;Lie, Chang-Hoon
    • IE interfaces
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    • v.20 no.2
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    • pp.216-226
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    • 2007
  • In code-division multiple-access (CDMA) systems with soft handoff, mobile station (MS) within soft handoff region can use multiple radio channels and receive their signals from multiple base stations (BSs) simultaneously. In this paper, the effects of soft handoff region ratio (SHRR) on reverse link of a CDMA cellular system are analytically investigated. In order to analyze the network performance and quality of service (QoS) perceived by users more realistically, both the soft capacity increasing factor and the traffic load variation affected by SHRR are jointly considered and a two-dimensional continuous time Markov chain (CTMC) model is built. In the numerical example, it is observed that the optimal guard channel exists according the variations of the traffic load and propagation conditions when the proper value of SHRR is determined.

A Multi-level Perception Security Model Using Virtualization

  • Lou, Rui;Jiang, Liehui;Chang, Rui;Wang, Yisen
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • v.12 no.11
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    • pp.5588-5613
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    • 2018
  • Virtualization technology has been widely applied in the area of computer security research that provides a new method for system protection. It has been a hotspot in system security research at present. Virtualization technology brings new risk as well as progress to computer operating system (OS). A multi-level perception security model using virtualization is proposed to deal with the problems of over-simplification of risk models, unreliable assumption of secure virtual machine monitor (VMM) and insufficient integration with virtualization technology in security design. Adopting the enhanced isolation mechanism of address space, the security perception units can be protected from risk environment. Based on parallel perceiving by the secure domain possessing with the same privilege level as VMM, a mechanism is established to ensure the security of VMM. In addition, a special pathway is set up to strengthen the ability of information interaction in the light of making reverse use of the method of covert channel. The evaluation results show that the proposed model is able to obtain the valuable risk information of system while ensuring the integrity of security perception units, and it can effectively identify the abnormal state of target system without significantly increasing the extra overhead.

Optimum Rake Processing for Multipath Fading in Direct-Sequence Spread-Spectrum Communication Systems (주파수대역 직접확산 통신시스템에서 다중경로 페이딩 보상을 위한 최적 레이크 신호처리에 관한 연구)

  • 장원석;이재천
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.28 no.10C
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    • pp.995-1006
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    • 2003
  • It is well know that in the wireless communication systems the transmitted signals can suffer from multipath fading due to the wave propagation characteristics and the obstacles over the paths, resulting in serious reduction in the power of the received signals. However, it is possible to take advantage of the inherent diversity imposed in the multipath reception if the underlying channel can be properly estimated. One of the diversity reception methods in this case is Rake processing. In this paper we study the Rake receivers for the direct-sequence spread-spectrum communication systems utilizing PN (pseudo noise) sequences to achieve spread spectrum. A conventional Rake receiver can use the finite-duration impulse (FIR) filter followed by the PN sequence demodulator, where the FIR filter coefficients are the reverse-ordered complex conjugate values of the fading channel impulse response estimates. Here, we propose a new Rake processing method by replacing the aforementioned PN code sequence with a new set of optimum demodulator coefficients. More specifically, the concept of the new optimum Rake processing is first introduced and then the optimum demodulator coefficients are theoretically derived. The performance obtained using the new optimum Rake processing is also calculated. The analytical results are verified by computer simulation. As a result, it is shown that the new optimum Rake processing method improves the MSE performance more than 10 dB over the conventional one using the fixed PN sequence demodulator. It is also shown that the new optimum Rake processing method improves the MSE performance about 10 dB over the Adaptive Correlator that performs the combining of the multipath components and PN demodulation concurrently. And finally, the MSE performance of the optimum Rake demodulator is very close to the MSE performance of OPSK demodulator under the AWGN channel.

A development of DS/CDMA MODEM architecture and its implementation (DS/CDMA 모뎀 구조와 ASIC Chip Set 개발)

  • 김제우;박종현;김석중;심복태;이홍직
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.22 no.6
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    • pp.1210-1230
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    • 1997
  • In this paper, we suggest an architecture of DS/CDMA tranceiver composed of one pilot channel used as reference and multiple traffic channels. The pilot channel-an unmodulated PN code-is used as the reference signal for synchronization of PN code and data demondulation. The coherent demodulation architecture is also exploited for the reverse link as well as for the forward link. Here are the characteristics of the suggested DS/CDMA system. First, we suggest an interlaced quadrature spreading(IQS) method. In this method, the PN coe for I-phase 1st channel is used for Q-phase 2nd channels and the PN code for Q-phase 1st channel is used for I-phase 2nd channel, and so on-which is quite different from the eisting spreading schemes of DS/CDMA systems, such as IS-95 digital CDMA cellular or W-CDMA for PCS. By doing IQS spreading, we can drastically reduce the zero crossing rate of the RF signals. Second, we introduce an adaptive threshold setting for the synchronization of PN code, an initial acquistion method that uses a single PN code generator and reduces the acquistion time by a half compared the existing ones, and exploit the state machines to reduce the reacquistion time Third, various kinds of functions, such as automatic frequency control(AFC), automatic level control(ALC), bit-error-rate(BER) estimator, and spectral shaping for reducing the adjacent channel interference, are introduced to improve the system performance. Fourth, we designed and implemented the DS/CDMA MODEM to be used for variable transmission rate applications-from 16Kbps to 1.024Mbps. We developed and confirmed the DS/CDMA MODEM architecture through mathematical analysis and various kind of simulations. The ASIC design was done using VHDL coding and synthesis. To cope with several different kinds of applications, we developed transmitter and receiver ASICs separately. While a single transmitter or receiver ASC contains three channels (one for the pilot and the others for the traffic channels), by combining several transmitter ASICs, we can expand the number of channels up to 64. The ASICs are now under use for implementing a line-of-sight (LOS) radio equipment.

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