• 한국정보디스플레이학회:학술대회논문집
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• 2009.10a
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• pp.431-433
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• 2009

We developed 4.8 inch WQVGA e-paper on plastic substrate using organic field effect transistors (OFETs). Polyethylene naphthalate (PEN) film was used as a flexible substrate and arrays of OFETs with bottom-gate, bottom-contact structure were fabricated on it. Lowtemperature curable organic gate insulating materials were employed and polymer semiconductor solutions were ink-jetted on arrays with high-resolution. At all steps, process temperature was limited below $130^{\circ}C$. Finally, we could drive flexible e-paper displays based on OFET arrays with the resolution of 100 dpi.

• Advances in Energy Research
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• v.1 no.2
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• pp.97-106
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• 2013

This study designs and tests a photovoltaic system with distributed maximum power point tracking (DMPPT) methodology using a field programmable gate array (FPGA) controller. Each solar panel in the distributed PV system is equipped with a newly designed DC/DC converter and the panel's voltage output is regulated by a FPGA controller using PI control. Power from each solar panel on the system is optimized by another controller where the quadratic maximization MPPT algorithm is used to ensure the panel's output power is always maximized. Experiments are carried out at atmospheric insolation with partial shading conditions using 4 amorphous silicon thin film solar panels of 2 different grades fabricated by Chi-Mei Energy. It is found that distributed MPPT requires only 100ms to find the maximum power point of the system. Compared with the traditional centralized PV (CPV) system, the distributed PV (DPV) system harvests more than 4% of solar energy in atmospheric weather condition, and 22% in average under 19% partial shading of one solar panel in the system. Test results for a 1.84 kW rated system composed by 8 poly-Si PV panels using another DC/DC converter design also confirm that the proposed system can be easily implemented into a larger PV power system. Additionally, the use of NI sbRIO-9642 FPGA-based controller is capable of controlling over 16 sets of PV modules, and a number of controllers can cooperate via the network if needed.

• Journal of the Microelectronics and Packaging Society
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• v.16 no.2
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• pp.21-25
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• 2009

The organic-inorganic thin film transistors (OITFTs) with ZnO channel layer and the cross-linked PVP (Poly-4-vinylphenol) gate insulator were fabricated on the patterned ITO gate/glass substrate. ZnO channel layer was deposited by using atomic layer deposition (ALD). In order to improve the electrical properties, $O_2$ plasma treatment onto PVP film was introduced and investigated the effect of the plasma treatments on the electrical properties of the OITFTs. The field effect mobility and sub-threshold slope (SS) values of the OITFT decreased slightly from 0.24 to 0.16 $cm^2/V{\cdot}s$ and from 9.7 to 9.2 V/dec, respectively with increasing RF power from 30 to 50 Watt. The $I_{on/off}$ ratio was about $10^3$ for all samples with $O_2$ plasma treatment.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.22 no.7
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• pp.949-955
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• 2018

Hardware-in-the-loop (HIL) simulation is a technique that can be employed for developing and testing complex real-time embedded systems. HIL simulation provides an effective platform for verifying power management system (PMS) performance of liquefied natural gas carriers, which are high value-added vessels such as offshore plants. However, HIL tests conducted by research institutes, including domestic shipyards, can be protracted. To address the said issue, this study proposes a field programmable gate array (FPGA) based PMS-HIL simulator that comprises a power supply, consumer, control console, and main switchboard. The proposed HIL simulation platform incorporated actual equipment data while conducting load sharing PMS tests. The proposed system was verified through symmetric, asymmetric, and fixed load sharing tests. The proposed system can thus potentially replace the standard factory acceptance tests. Furthermore, the proposed simulator can be helpful in developing additional systems for vessel automation and autonomous operation, including the development of energy management systems.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.18 no.8
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• pp.1833-1839
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• 2014

In this paper, a systematic demapping algorithm for three-dimensional (3-D) lattice signal constellations is presented. The algorithm consists of decision of an octant, computation of a distance from the origin, and determination of the coordinates of a symbol. Since the algorithm can be extended systematically, it is applicable to the larger lattice constellations. To verify the algorithm, 3-D signal transmission systems with field programmable gate array (FPGA) and $Matlab^{(R)}$ are implemented. And they are exploited to carry out computer simulation. As a result, both hardware and software based systems produce almost the same symbol error rates (SERs) in an additive white Gaussian noise (AWGN) environment. In addition, the hardware based system implemented with an FPGA generates waveforms of 3-D signals and recovers the original binary sequences perfectly. Those results confirm that the algorithm and the implemented 3-D transmission system operate correctly.

• Korean Institute of Interior Design Journal
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• v.14 no.4 s.51
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• pp.95-105
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• 2005

To plan more effective exhibitions, exhibitions should be evaluated and verified through research. This is Important in that it will present measures for improving shortcomings in exhibition goals and procedures; and it will also provide new ideas and goals for future exhibition plans. The purposes of this study are to investigate the applicability of evaluation methods by organizing related theories systematically through a literature review and to provide more practical and valuable information about the methods by applying them to actual museums. For this study, the National Science Museum was investigated since it uses various themes and exhibition methods, compared with other science museums. Exhibition structures and presentation formats were first analyzed, and then the methods of trace and observation were used to investigate how visitors use the museum. Surveys were also conducted at two different times. The results of the analyses showed that problems of exhibits, arrangement methods of exhibition space, or guide systems are more prominent than those of the presentation format itself. Based on these results, measures for improvement are suggested as follows: First, new formats of exhibition halls using new window frames or holes should be explored to stimulate visitors' curiosity and to lead viewing traffic flow in the museum. Second, in presenting representative exhibits, a gate can be installed at each exhibition area, and representative exhibits are displayed by the gate or between exhibition booths. Third, if a small space is provided at the end of each exhibition area, it can be used to give an orientation on the next exhibition or used as a resting place.

• KSCE Journal of Civil and Environmental Engineering Research
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• v.41 no.5
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• pp.571-580
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• 2021

When constructing railway stations, gates shall be located in appropriate locations for convenient use. However, to reduce construction costs, the number of gates was minimized and the location was not appropriately placed to the direction of many users. This study proposed a method to calculate the benefits of additional gate installations using the improvement of pedestrian traffic flow, occupied area and travel time as economic effects. In particular, a method of estimating the percentage of people using certain gates and the number of people by route within the station was proposed. This method was applied to analyze the effect of additional gates to Gwang-myeong Station on the Shinansan Line, which is to be opened in 2025. The effect has only improved in mobility. The first year of its opening was estimated at 5.91 billion won for mobility and 75.8 billion won for cost, and the B/C was 1.21 for 30 years after its opening. It is expected that this method will be applied to systematic effect analysis when additional gates are installed at unopened railway stations as well as existing railway stations.

• Journal of the Korean Wood Science and Technology
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• v.49 no.6
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• pp.550-565
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• 2021

This study's objective was to conduct species identification and tree-ring dating of wooden elements used in Mungyeong Juheulgwan of Joryeong (Gate No. 1). Of the 84 wooden elements evaluated, 76 were confirmed to be hard pines, 5 were soft pines, and 3 belonged to Abies spp. For tree-ring dating, cores of the wooden elements were collected using a drill, and ring-width plots of individual samples were constructed using the TSAP software. The results of performing tree-ring dating for the outermost ring of 59 hard pine wooden elements revealed the following 4 felling dates: summer of 1708-late fall of 1709, summer of 1792-early spring of 1794, late fall of 1838-early spring of 1840 and 1867, and early spring-fall of 1872. These felling dates were found to be consistent with those in the construction and repair records of the Annals of Joseon Dynasty, Juhulgwan Jungsugi, and those engraved on Juhulgwan Walls. It is believed that some of the wooden materials harvested at that time were stored and used since there was a difference of approximately10 years between the repair records and felling dates.

• Journal of the Korean Physical Society
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• v.73 no.9
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• pp.1393-1398
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• 2018

In conventional single-photon emission computed tomography (SPECT), only the photoelectric events in the detectors are used for image reconstruction. However, if the $^{131}I$ isotope, which emits high-energy radiations (364, 637, and 723 keV), is used in nuclear medicine, both photoelectric and Compton scattering events can be used for image reconstruction. The purpose of our work is to perform simulations for Compton SPECT by using the Geant4 application for tomographic emission (GATE). The performance of Compton SPECT is evaluated and compared with that of conventional SPECT. The Compton SPECT unit has an area of $12cm{\times}12cm$ with four gantry heads. Each head is composed of a 2-cm tungsten collimator and a $40{\times}40$ array of CdZnTe (CZT) crystals with a $3{\times}3mm^2$ area and a 6-mm thickness. Compton SPECT can use not only the photoelectric effect but also the Compton scattering effect for image reconstruction. The correct sequential order of the interactions used for image reconstruction is determined using the angular resolution measurement (ARM) method and the energies deposited in each detector. In all the results of simulations using spherical volume sources of various diameters, the reconstructed images of Compton SPECT show higher signal-to-noise ratios (SNRs) without degradation of the image resolution when compared to those of conventional SPECT because the effective count for image reconstruction is higher. For a Derenzo-like phantom, the reconstructed images for different modalities are compared by visual inspection and by using their projected histograms in the X-direction of the reconstructed images.

• Korean Journal of Metals and Materials
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• v.48 no.3
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• pp.256-261
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• 2010

In this work, high-k dielectric stacks of $HfO_2$ and $HfO_2$/$Al_2O_3$/$HfO_2$ (HAH) were deposited on $SiO_2/Si$ substrates by atomic layer deposition as charge trapping layers in charge trapping devices. The structural stability and the charge trapping characteristics of such stacks were investigated using Metal-Alumina-Hafnia-Oxide-Silicon (MAHOS) structure. The surface roughness of $HfO_2$ was stable up to 11 nm with the insertion of 0.2 nm thick $Al_2O_3$. The effect of the thickness of the HAH stack and the thickness of intermediate $Al_2O_3$ on charge trapping characteristics were investigated for MAHOS structure under various gate bias pulse with duration of 100 ms. The threshold voltage shift after programming and erase showed that the memory window was increased with increasing bias on gate. However, the programming window was independent of the thickness of HAH charge trapping layers. When the thickness of $Al_2O_3$insertion increased from 0.2 nm to 1 nm, the erase window was decreased without change in the programming window.