• Title/Summary/Keyword: Relaxation-oscillating

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A Low Area and High Efficiency SMPS with a PWM Generator Based on a Pseudo Relaxation-Oscillating Technique (Pseudo Relaxation-Oscillating 기법의 PWM 발생기를 이용한 저면적, 고효율 SMPS)

  • Lim, Ji-Hoon;Wee, Jae-Kyung;Song, Inchae
    • Journal of the Institute of Electronics and Information Engineers
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    • v.50 no.11
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    • pp.70-77
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    • 2013
  • We suggest a low area and high efficiency switched-mode power supply (SMPS) with a pulse width modulation (PWM) generator based on a pseudo relaxation-oscillating technique. In the proposed circuit, the PWM duty ratio is determined by the voltage slope control of an internal capacitor according to amount of charging current in a PWM generator. Compared to conventional SMPSs, the proposed control method consists of a simple structure without the filter circuits needed for an analog-controlled SMPS or the digital compensator used by a digitally-controlled SMPS. The proposed circuit is able to operate at switching frequency of 1MHz~10MHz, as this frequency can be controlled from the selection of one of the internal capacitors in a PWM generator. The maximum current of the core circuit is 2.7 mA, and the total current of the entire circuit including output buffer driver is 15 mA at 10 MHz switching frequency. The proposed SMPS has a simulated maximum ripple voltage of 7mV. In this paper, to verify the operation of the proposed circuit, we performed simulation using Dongbu Hitek BCD $0.35{\mu}m$ technology and measured the proposed circuit.

One-Chip Multi-Output SMPS using a Shared Digital Controller and Pseudo Relaxation Oscillating Technique (디지털 컨트롤러 공유 및 Pseudo Relaxation Oscillating 기법을 이용한 원-칩 다중출력 SMPS)

  • Park, Young-Kyun;Lim, Ji-Hoon;Wee, Jae-Kyung;Lee, Yong-Keun;Song, Inchae
    • Journal of the Institute of Electronics and Information Engineers
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    • v.50 no.1
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    • pp.148-156
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    • 2013
  • This paper suggests a multi-level and multi-output SMPS based on a shared digital logic controller through independently operating in each dedicated time periods. Although the shared architecture can be devised with small area and high efficiency, it has critical drawbacks that real-time control of each DPWM generators are impossible and its output voltage can be unstable. To solve these problems, a real-time current compensation scheme is proposed as a solution. A current consumption of the core block and entire block with four driver buffers was simulated about 4.9mA and 30mA at 10MHz switching frequency and 100MHz core operating frequency. Output voltage ripple was 11 mV at 3.3V output voltage. Over/undershoot voltage was 10mV/19.6mV at 3.3V output voltage. The noise performance was simulated at 800mA and 100KHz load regulation. Core circuit can be implemented small size in $700{\mu}m{\times}800{\mu}m$ area. For the verification of proposed circuit, the simulations were carried out with Dong-bu Hitek BCD $0.35{\mu}m$ technology.

Wind velocity simulation of spatial three-dimensional fields based on autoregressive model

  • Gao, Wei-Cheng;Yu, Yan-Lei
    • Wind and Structures
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    • v.11 no.3
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    • pp.241-256
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    • 2008
  • This paper adopts autoregressive (AR) model to simulate the wind velocity of spatial three-dimensional fields in accordance with the time and space dependent characteristics of the 3-D fields. Based on the built MATLAB programming, this paper discusses in detail the issues of the AR model deduced by matrix form in the simulation and proposes the corresponding solving methods: the over-relaxation iteration to solve the large sparse matrix equations produced by large number of degrees of freedom of structures; the improved Gauss formula to calculate the numerical integral equations which integral functions contain oscillating functions; the mixed congruence and central limit theorem of Lindberg-Levy to generate random numbers. This paper also develops a method of ascertaining the rank of the AR model. The numerical examples show that all those methods are stable and reliable, which can be used to simulate the wind velocity of all large span structures in civil engineering.

Complex Modulus of Rough Rice Kernel under Cyclic Loading (주기적(週期的) 반복하중(反復荷重)을 받는 벼의 복소탄성율(複素彈性率))

  • Kim, M.S.;Park, J.M.
    • Journal of Biosystems Engineering
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    • v.16 no.3
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    • pp.263-271
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    • 1991
  • When grains is subjected to oscillating load, the dynamic viscoelastic behavior of the material will be describe the complex modulus of the material. The complex modulus and therefore the storage modulus, the loss modulus, and the phase angle for the sample should be obtainable with a given static viscoelastic property of the material under static load. The complex relaxation moduli of the rough rice kernel were computed from the Burger's model describing creep behavior of the material which were obtained in the previous study. Also, the effects of cyclic load and moisture content of grain on the dynamic viscoelastic behavior of the samples were analized. The storage modulus of the rough rice kernel slightly increased with the frequency applied but at above the frequency of 0.1 Hz it was nearly constant with the frequency, and the loss modulus of the sample very rapidly decreased with increase in the frequency on those frequency ranges. It was shown that the storage modulus and the loss modulus of the sample increased with decrease in grain moisture content. Effect of grain moisture content on the storage modulus of the sample was highly significant than effect of the frequency applied, but effect of the frequency on the loss modulus of the sample was more significant than effect of grain moisture content.

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