• 정보통신설비학회논문지
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• 제9권3호
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• pp.80-85
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• 2010

In this paper, we present an algorithm for efficient control of backlight LED in order to reduce the power consumption of LCD TV. In addition, a pragmatic implementation method is presented. In conventional local dimming control, backlight LEDs of LCD TV are divided into $M{\times}N$ blocks. And, the proper luminance for each block is computed according to input image and used for dimming control. But, LED light of each block is diffused and affects the neighboring blocks, so that luminance of each block becomes larger than that of intent. In the proposed algorithm, dimming control values are reduced by the amount of quantity affected by the neighboring blocks using light spread function, resulting in additional reduction of power consumption.

• 대한기계학회논문집A
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• 제27권2호
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• pp.276-284
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• 2003

The preconditioned conjugate gradient method is an efficient iterative solution scheme for large size finite element problems. As preconditioning method, we choose an incomplete Cholesky factorization which has efficiency and easiness in implementation in this paper. The incomplete Cholesky factorization mettled sometimes leads to breakdown of the computational procedure that means pivots in the matrix become minus during factorization. So, it is inevitable that a reduction process fur stabilizing and this process will guarantee robustness of the algorithm at the cost of a little computation. Recently incomplete factorization that enhances robustness through increasing diagonal dominancy instead of reduction process has been developed. This method has better efficiency for the problem that has rotational degree of freedom but is sensitive to parameters and the breakdown can be occurred occasionally. Therefore, this paper presents new method that guarantees robustness for this method. Numerical experiment shows that the present method guarantees robustness without further efficiency loss.

• Journal of Power Electronics
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• 제13권4호
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• pp.647-655
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• 2013

In this paper, an approach to reduce the common-mode voltage and to eliminate narrow pulse for implemented AC-DC matrix converters is presented. An improved space vector modulation (SVM) strategy is developed by replacing the zero space vectors with suitable pairs of active ones. Further, while considering the commutation time, the probability of narrow pulse in the conventional and proposed SVM methods are derived and compared. The advantages of the proposed scheme include: a 50% reduction in the peak value of the common-mode voltage; improved input and output performances; a reduction in the switching loss by a reduced number of switching commutations and a simplified implementation via software. Experimental results are presented to demonstrate the correctness of the theoretical analysis, as well as the feasibility of the proposed strategy.

• KSII Transactions on Internet and Information Systems (TIIS)
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• 제10권7호
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• pp.3117-3130
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• 2016

High peak-to-average power ratio (PAPR) of transmitted signals is a major drawback in Multicarrier modulation (MCM) systems. Companding transform is a well-known method to reduce the PAPR without restrictions on system parameters such as the number of subcarriers, frame format and constellation type. In this paper, a novel adaptive companding scheme, mainly focuses on compressing the large signals into the desirable distribution, is proposed to reduce the PAPR with low implementation complexity. In addition, formulas to calculate its PAPR and bit error rate (BER) performance are also derived. Simulation results confirm that the proposed scheme can achieve an effective tradeoff between PAPR reduction and BER performance by carefully choosing the companding parameter.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2006년도 하계종합학술대회
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• pp.339-340
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• 2006

In this paper, a low-power deblocking filter structure for H.264 video coding algorithm is proposed. By sharing addition hardware for common filter coefficients, we have designed an efficient deblocking filter structure. Proposed deblocking filter utilizes MUX and DEMUX circuits for input data sharing and shows 44.2% reduction for add operation. In the HDL coding simulation and FPGA implementation, we achieved 19.5% and 19.4% gate count reduction, respectively, comparison with the conventional deblocking filter structure.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2006년도 하계종합학술대회
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• pp.13-14
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• 2006

In this paper, an efficient butterfly structure for Radix-4 FFT algorithm using DA(Distributed Arithmetic) is proposed. It is shown that DA can be efficiently used in twiddle factor calculation of the Radix-4 FFT algorithm. The Verilog-HDL coding results for the proposed DA butterfly structure show 61.02% cell area reduction comparison with those of the conventional multiplier butterfly structure. Furthermore, the 64-point Radix-4 pipeline structure using the proposed butterfly and delay commutators is compared with other conventional structures. Implementation coding results show 46.1% cell area reduction.

• JSTS:Journal of Semiconductor Technology and Science
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• 제14권6호
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• pp.741-749
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• 2014

Low power double data rate 2 non-volatile memory (LPDDR2-NVM) has been deemed the standard interface to connect non-volatile memory devices such as phase-change memory (PCM) directly to the main memory bus. However, most of the previous literature does not consider or overlook this standard interface. In this paper, we propose address phase skipping by reforming the way of interfacing with LPDDR2-NVM. To verify effectiveness and functionality, we also develop a system-level prototype that includes our customized LPDDR2-NVM controller and commercial PCM devices. Extensive simulations and measurements demonstrate up to a 3.6% memory access time reduction for commercial PCM devices and a 31.7% reduction with optimistic parameters of the PCM research prototypes in industries.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2005년도 전력전자학술대회 논문집
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• pp.504-506
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• 2005

This paper proposes a new neutral current reduction method using PQR instantaneous power theory on the active power filter, unbalanced nonlinear load condition in three-phase four-wire systems. For reduction of neutral line current, the single phase active power filter is used and its performance is same with the three-phase four-wire active power filter. For fully-digital implementation, ramp comparison PWM method was adopted. Simulation results verify good performance of the proposed current control strategy on the shunt APFs.

• 한국통신학회논문지
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• 제30권6C호
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• pp.450-456
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• 2005

In this paper, we propose a high-speed turbo decoding algorithm and present results of its implementation. The latency caused by (de)interleaving and iterative decoding in conventional MAP turbo decoder can be dramatically reduced with the proposed scheme. The main cause of the time reduction is to use radix-4, center to top, and parallel decoding algorithm. The reduced latency makes it possible to use turbo decoder as a FEC scheme in the real-time wireless communication services. However the proposed scheme costs slight degradation in BER performance because the effective interleaver size in radix-4 is reduced to an half of that in conventional method. To ensure the time reduction, we implemented the proposed scheme on a FPGA chip and compared with conventional one in terms of decoding speed. The decoding speed of the proposed scheme is faster than conventional one at least by 5 times for a single iteration of turbo decoding.

• BMB Reports
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• 제46권7호
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• pp.335-337
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• 2013

Scientists planning research that involves the use of animals are required by international and/or national law to examine the possibilities for the implementation of Replacement, Reduction and/or Refinement (the Three Rs principles of Russell and Burch) in experiments for research, testing, and education. There are two Korean laws legislating humane use of animals and ethical review prior to animal experiments. This report reviews current practice of the literature search by the researchers and protocol review by the Institutional Animal Care and Use Committees on the Replacement, Reduction and Refinement alternatives in Korea. The promotion and protection of the laboratory animals are one of the core competencies of investigators exploring the ethical conduct of research and good science.