Low-Power Radix-4 butterfly structure for OFDM FFT

OFDM FFT용 저전력 Radix-4 나비연산기 구조

  • Kim, Do-Han (Department of Information and Telecommunication Engineering, Sangmyung University) ;
  • Kim, Bee-Chul (Department of Information and Telecommunication Engineering, Sangmyung University) ;
  • Hur, Eun-Sung (Department of Information and Telecommunication Engineering, Sangmyung University) ;
  • Lee, Won-Sang (Department of Information and Telecommunication Engineering, Sangmyung University) ;
  • Jang, Young-Beom (Department of Information and Telecommunication Engineering, Sangmyung University)
  • 김도한 (상명대학교 정보통신공학부) ;
  • 김비철 (상명대학교 정보통신공학부) ;
  • 허은성 (상명대학교 정보통신공학부) ;
  • 이원상 (상명대학교 정보통신공학부) ;
  • 장영범 (상명대학교 정보통신공학부)
  • Published : 2006.06.21

Abstract

In this paper, an efficient butterfly structure for Radix-4 FFT algorithm using DA(Distributed Arithmetic) is proposed. It is shown that DA can be efficiently used in twiddle factor calculation of the Radix-4 FFT algorithm. The Verilog-HDL coding results for the proposed DA butterfly structure show 61.02% cell area reduction comparison with those of the conventional multiplier butterfly structure. Furthermore, the 64-point Radix-4 pipeline structure using the proposed butterfly and delay commutators is compared with other conventional structures. Implementation coding results show 46.1% cell area reduction.

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