• ETRI Journal
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• v.30 no.1
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• pp.167-169
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• 2008

In this paper, we propose hardware architecture for a high-speed context-adaptive variable length coding (CAVLC) decoder in H.264. In the CAVLC decoder, the codeword length of the current decoding block is used to determine the next input bitstreams (valid bits). Since the computation of valid bits increases the total processing time of CAVLC, we propose two techniques to reduce processing time: one is to reduce the number of decoding steps by introducing a lookup table, and the other is to reduce cycles for calculating the valid bits. The proposed CAVLC decoder can decode $1920{\times}1088$ 30 fps video in real time at a 30.8 MHz clock.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.15 no.6
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• pp.492-505
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• 2022

This study is a study on the results of improving the logic to effectively transmit and decode compressed data in real time by improving the encoding and decoding performance of BL-beta codes that can be used for lossless real-time transmission of IoT sensing data. The encoding process of BL-beta code includes log function, exponential function, division and square root operation, etc., which have relatively high computational burden. To improve them, using bit operation, binary number pattern analysis, and initial value setting of Newton-Raphson method using bit pattern, a new regularity that can quickly encode and decode data into BL-beta code was discovered, and by applying this, the encoding speed of the algorithm was improved by an average of 24.8% and the decoding speed by an average of 5.3% compared to previous study.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.32 no.12A
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• pp.1219-1225
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• 2007

In this paper, we propose a new quasi-orthogonal space-time block code(QO-STBC) achieving full rate and full diversity for general QAM and quasi-static Rayleigh fading channels with four transmit antennas. This code possesses the quasi orthogonal property like the conventional minimum decoding complexity QO-STBC(MDC-QO-STBC), which allows independently a maximum likelihood(ML) decoding to only require joint detection of two real symbols. By computer simulation results, we show that the proposed code exhibits the identical BER performance with the existing MDC-QO-STBC. However, the proposed code has an advantage in the transceiver implementation since the original coding scheme may be modified so that increases of peak-to-average power ratio occur at only two transmit antennas, but the MDC-QO-STBC does at all of transmit antennas.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.28 no.3C
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• pp.296-306
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• 2003

In this paper, algorithm for non-iterative decoding method is proposed and fractal image decoder based on non-iterative fractal decoding algorithm used general purpose digital signal processors is designed and implemented. The algorithm is showed that the attractor image can be obtained analytically whe n the image is encoded using the fractal algorithm proposed by Monro and Dudbridge, in which the corresponding domain block for a range block is fifed. Using the analytical formulas, we can obtain the attractor image without iteration procedure. And we get general formulas of obtained analytical formulas. Computer simulation results for various test images show that we can increase the image decoding speed by more than five times when we use the analytical formulas compared to the previous iteration methods. The fractal image decoder contains two ADSP2181's and perform image decoding by three stage pipeline structure. The performance tests of the implemented decoder is elapsed 31.2ms/frame decoding speed for QCIF data when all the frames are decoded. The results enable us to process the real-time fractal decoding over 30 frames/sec.

• MALSORI
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• no.52
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• pp.111-120
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• 2004

This paper focuses on the DSP implementation of an HMM-based speech recognizer that can handle several hundred words of vocabulary size as well as speaker independency. First, we develop an HMM-based speech recognition system on the PC that operates on the frame basis with parallel processing of feature extraction and Viterbi decoding to make the processing delay as small as possible. Many techniques such as linear discriminant analysis, state-based Gaussian selection, and phonetic tied mixture model are employed for reduction of computational burden and memory size. The system is then properly optimized and compiled on the TMS320C6711 DSP for real-time operation. The implemented system uses 486kbytes of memory for data and acoustic models, and 24.5 kbytes for program code. Maximum required time of 29.2 ms for processing a frame of 32 ms of speech validates real-time operation of the implemented system.

• KIISE Transactions on Computing Practices
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• v.20 no.11
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• pp.604-609
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• 2014

Decoding processes in portable media players have a high computational cost, resulting in high power consumption by the CPU. If decoding computations are reduced, the power consumed by the CPU is also be reduced, but such a choice generally results in a degradation of the video quality for the users, so it is essential to address this tradeoff. We proposed a new CPU power management scheme that can make use of the scalability property available in the H.164/SVC standard. We first proposed a new video quality model that makes use of a video quality metric(VQM) in order to efficiently take into account the different quantization factors in the SVC. We then propose a new dynamic voltage scaling(DVS) scheme that can selectively combine the previous decoding times and frame sizes in order to accurately predict the next decoding time. We then implemented a scheme on a commercial smartphone and performed a user test in order to examine how users react to the VQM difference. Real measurements show that the proposed scheme uses up to 34% fewer energy than the Linux DVFS governor, and user tests confirm that the degradation in the quality is quite tolerable.

• Journal of the Institute of Convergence Signal Processing
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• v.2 no.2
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• pp.62-67
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• 2001

In the recent mobile communication systems, the performance of Turbo Code using the error correction coding depends on the interleaver influencing the free distance determination and the recursive decoding algorithms that is executed in the turbo decoder. However, performance depends on the interleaver depth that need a large time delay over the reception process. Moreover, Turbo Code has been known as the robust ending method with the confidence over the fading channel. The International Telecommunication Union(ITU) has recently adopted as the standardization of the channel coding over the third generation mobile communications such as IMT-2000. Therefore, in this paper, we proposed of the method to improve the conventional performance with the parallel concatenated 4-New Turbo Decoder using MAP a1gorithm in spite of complexity increasement. In the real-time video and video service over the third generation mobile communications, the performance of the proposed method was analyzed by the reduced decoding delay using the variable decoding method by computer simulation over AWGN and fading channels.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.30 no.5C
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• pp.382-390
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• 2005

Huffman codes are widely used for image and video data transmission. As the increase of real-time data, a lot of studies on effective decoding algorithms and architectures have been done. In this paper, we proposed a balanced binary search tree for Huffman decoding and compared the performance of the proposed architecture with that of previous works. Based on definitions of the comparison of codewords with different lengths, the proposed architecture constructs a balanced binary tree which does not include empty internal nodes, and hence it is very efficient in the memory requirement. Performance evaluation results using actual image data show that the proposed architecture requires small number of table entries, and the decoding time is 1, 5, and 2.41 memory accesses in minimum, maximum, and average, respectively.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.22 no.5
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• pp.907-914
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• 1997

The conventional decoding procedure for the images encoded using fractal contractive transformation algorithms is performed by applying the transformations iteratively for an arbirary initial image. In this paper, we showed that the atractor image can be obtained analytically when the image is encoded using the fractal algorithm proposed by Monro and Dudbridge, in which the corresponding domain block for a range block is fixed. Using the analytical formula, we can obtain the attractor image without iteration procedure. Computer simulation results for various test images show that we can increase the image decoding speed by more than five times when we use the analytical formula compared to the previous iteration methods. Also we confirmed that the real time decoding by software on PD is possible for the moving picture with QCIF formats.

• Journal of the Institute of Electronics Engineers of Korea CI
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• v.40 no.6
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• pp.118-126
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• 2003

This paper presents a low-complexity algorithm lot browsing a HD bit stream in DTV PVR according to its characteristics and also presents its implementation results. We propose an efficient algorithm which detects shots using some information after decoding MPEG-2 data, clusters them into scene and episode, and intelligently browses them according to some criteria after calculating their complexity. Some simulation results are presented to show the performance feasibility of the proposed algorithm. To implement it in real time, we propose an efficient hybrid architecture which partitions the algorithm into two parts of hardware and software. The hardware covers decoding process and extraction of some basic information which take most complexity in implementing the algorithm. The software covers the heuristic part of tile algorithm which has low complexity and needs to be expandable.