• Journal of Computing Science and Engineering
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• v.9 no.4
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• pp.177-189
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• 2015

High-performance processors using Non-Uniform Cache Architecture (NUCA) are increasingly used to deal with the growing wire delays in multicore/manycore processors. Due to the convergence of high-performance computing with embedded computing, NUCA caches are expected to benefit high-end embedded systems as well. However, for real-time systems that use multicore processors with NUCA caches, it is crucial to bound worst-case execution time (WCET) accurately and safely. In this paper, we developed a WCET analysis approach by considering the effect of static NUCA caches on WCET. We compared the WCET in real-time applications with different topologies of static NUCA caches. Our experimental results demonstrated that the static NUCA cache could improve the worst-case performance of realtime applications using multicore processor compared to the cache with uniform access time.

• Proceedings of the KIEE Conference
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• 2006.04a
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• pp.336-338
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• 2006

One of the important topics concerning the safety of electrical and electronic system is the reliability of the wiring system. The Time-Frequency Domain Reflectometry(TFDR) is a state-of-the-art system for detection and estimation of the fault on a wiring/cable. The purpose of this paper is to implement a Labview based TFDR Real Time system though the instruments of PCI extensions for Instrumentation(PXI). The TFDR Real Time system consists of the five parts: Reference signal design, signal generation, signal acquisition, algorithm execution, results diplay part. In the signal generation and acquisition parts we adopt the Arbitrary Waveform Generator(AWG) and Digital Storage Oscilloscope(DSO) PXI modules which offer commonality, compatibility and easy integration at low cost. And execution of the PXI modules not only is controlled by the Labview programing but also the total system process is executed by the Labview application software.

• 연구논문집
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• s.27
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• pp.167-174
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• 1997

Point of Production/Manufacturing Execution Systems are an essential component of operations in today's competitive business environments, which require greater production efficiency and effectiveness. POP/MES focuses on the valuing-adding processes, helping to reduce manufacturing cycle time, improve product quality, reduce WIP, reduce or eliminate paperwork between shifts, reduce lead time and empowering plant operations staff. In this paper, we implement POP/MES to manage real-time plant floor data which is gathered by I/O server into database management system. I/O server is a software allows data exchange between factory real-time database and several hardware devices such as PLC, DCS, robot and sensor through ethernet TCP/IP protocol.

• Proceedings of the IEEK Conference
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• 2003.07d
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• pp.1379-1382
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• 2003

Recently, mobile embedded systems used widly in various applications. Managing power consumption is becoming a matter of primary concern because those systems use limited power supply. As an approach reduce power consumption, voltage can be scaled down. according to the execution time and deadline. By reducing the supplying voltage to 1/N power consumption can be reduced to 1/N. DPM-S is a well known method for dynamic voltage scaling. In this paper, we enhanced DPM-S by using average execution time aggressively. The frequency of processor is calculated based in average execution time instead of worst case execution time. Simulation results show that our method achieve up to 5％ energy savings than DPM-S.

• Journal of the Korea Society for Simulation
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• v.11 no.3
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• pp.23-34
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• 2002

Dynamic storage allocation (DSA) is a field fairly well studied for a long time as a basic problem of system software area. Due to memory fragmentation problem of DSA and its unpredictable worst case execution time, real-time system designers have believed that DSA may not be promising for real-time application service. Recently, the need for an efficient DSA algorithm is widely discussed and the algorithm is considered to be very important in the real-time system. This paper proposes an efficient DSA algorithm called QSB (quick semi-buddy) which is designed to be suitable for real-time environment. QSB scheme effectively maintains free lists based on quick-fit approach to quickly accommodate small and frequent memory requests, and the other free lists devised with adaptation upon a typical binary buddy mechanism for bigger requests in harmony for the .improved performance. Comprehensive simulation results show that the proposed scheme outperforms QHF which is known to be effective in terms of memory fragmentation up to about 16%. Furthermore, the memory allocation failure ratio is significantly decreased and the worst case execution time is predictable.

• Transactions of the Korean Society of Automotive Engineers
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• v.10 no.5
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• pp.114-120
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• 2002

In a distributed real-time control system, it is essential to confirm the timing behavior of all tasks because these tasks of each real-time controller have to finish their processes within the specified time intervals called a deadline. In order to satisfy this objective, the timing analysis of a distributed real-time system such as shcedulability test must be performed during the system design phase. In this study, a simple application of CAN fur a vehicle body network system is formulated to apply to a holistic scheduling analysis, and the worst-case execution time (WCET) and the worst-case end-to-end response time (WCRT) are evaluated in the point of holistic system view.

• Journal of the Institute of Electronics Engineers of Korea CI
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• v.43 no.2 s.308
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• pp.12-20
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• 2006

In scheduling of real-time tasks, the required hardware performance for a given set of tasks is determined based on the worst case execution time. For soft real-time tasks as multimedia applications, a lower performance hardware can service the tasks. Since the execution time of a task can vary in time, we can reclaim the slacks of early completed tasks for those of longer than average execution times. Then, the average ratio of deadline-miss can be lowered. This paper presents an algorithm, Aggressive Slack Reclamation (ASR), that tasks share slacks aggressively. A simulation result shows that ASR enhances the deadline-miss ratio and number of context switches than previous results.

• International journal of advanced smart convergence
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• v.7 no.3
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• pp.92-100
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• 2018

In this paper, we propose a fault-tolerant scheduling scheme with energy efficiency for real-time periodic tasks on DVFS-enabled multicore processors. The scheme provides the tolerance of a permanent fault with the primary-backup task model. Also the scheme reduces the energy consumption of real-time tasks with the fully overlapped execution between each primary task and its backup task, whereas most of previous methods tried to minimize the overlapped execution between the two tasks. In order to the leakage energy loss of idle cores, the scheme activates a part of available cores with rarely used cores powered off. Evaluation results show that the proposed scheme saves up to 82% energy consumption of the previous method.

• Journal of Korean Society of Industrial and Systems Engineering
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• v.31 no.4
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• pp.49-58
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• 2008

This paper proposes a methodology to measure the risk level in real-time for Business Activity Monitoring (BAM). A decision-tree methodology was employed to analyze the effect of process attributes on the result of the process execution. In the course of process execution, the level of risk is monitored in real-time, and an early warning can be issued depending on the change of the risk level. An algorithm for estimating the risk of ongoing processes in real-time was formulated. Comparison experiments were conducted to demonstrate the effectiveness of our method. The proposed method detects the risks of business processes more precisely and even earlier than existing approaches.

• The KIPS Transactions:PartA
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• v.12A no.7 s.97
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• pp.583-588
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• 2005

To develop SoC program for embedded systems, a tool that can remotely debug from host system is needed. Because the existing remote debugging systems using GDB don't offer information of the SoC program execution in real-time, it is difficult to observe condition of the program execution, and also they have limited characteristics to tools and use costly adaptors. In this paper, a real-time tracking tool that can record SoC status on the nv each execution of the assigned instructions is introduced and an economical USB-JTAG adaptor is proposed. And it is shown that this tool can track the execution of a composed program in the target system based on PXA255 processor.