• 제어로봇시스템학회:학술대회논문집
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• 2000.10a
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• pp.32-32
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• 2000

We present CReMeS, a CORBA-compliant design and implementation of a new real-time communication service. It provide for of a new real-time communication service. It provide for efficient, predictable, and scalable communication between information producers and consumers. Experimental results demonstrate that CReMeS can achieve better performance, predictability and scalability than a Real-Time implementaion of the CORBA Event Service.

• 제어로봇시스템학회:학술대회논문집
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• 1987.10b
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• pp.382-388
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• 1987

In this paper, the performance of Mini MAP architecture is analyzed by simulation method. Token rotation time and waiting time are obtained by simulation. The results of the simulation are compared with these of the analytic model. From these comparisons, it is shown that simulation results are approximately identical to analytic results. Mini MAP architecture has good real time performances in token rotation time and waiting time and can be used to many real time applications.

• International Journal of Internet, Broadcasting and Communication
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• v.13 no.1
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• pp.134-142
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• 2021

This paper proposes a probabilistic method in analyzing timing measurements to determine the periodicity of real-time tasks. The proposed method fills a gap in existing techniques, which either concentrate on the estimation of worst-case execution times, or do not consider the stochastic behavior of the real-time scheduler. Our method is based on the Z-test statistical analysis which calculates the probability of the measured period to fall within a user-defined standard deviation limit. The distribution of the measured period should satisfy two conditions: its center (statistical mean) should be equal to the scheduled period of the real-time task, and that it should be symmetrical with most of the samples focused on the center. To ensure that these requirements are met, a data adjustment process, which omits any outliers in the expense of accuracy, is presented. Then, the Z-score of the distribution according to the user-defined deviation limit provides a probability which determines the periodicity of the real-time task. Experiments are conducted to analyze the timing measurements of real-time tasks based on real-time Linux extensions of Xenomai and RT-Preempt. The results indicate that the proposed method is able to provide easier interpretation of the periodicity of real-time tasks which are valuable especially in comparing the performance of various real-time systems.

• Journal of Institute of Control, Robotics and Systems
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• v.9 no.10
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• pp.789-797
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• 2003

An implementation scheme and some improvements are proposed to adopt public-licensed operating system, Linux and de-facto world-wide network standard, TCP/IP into the field of behavior-based autonomous mobile robots. To demonstrate the needs of scheme and the improvement, an analysis is performed on a server/client communication problem with real time Linux previously proposed, and another analysis is also performed on interactions among TCP/IP communications and the performance of Linux system using them. Implementation of behavior-based control architecture on real time Linux is proposed firstly. Revised task-scheduling schemes are proposed that can enhance the performance of server/client communication among local tasks on a Linux platform. A new method of TCP/IP packet flow handling is proposed that prioritizes TCP/IP software interrupts with aperiodic server mechanism as well. To evaluate the implementation scheme and the proposed improvements, performance enhancements are shown through some simulations.

• IEMEK Journal of Embedded Systems and Applications
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• v.10 no.4
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• pp.233-239
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• 2015

This paper describes a method that is integrated trace for real-time virtualization environment. This method has solved the problem that the performance trace may not be able to analyze integrated method between heterogeneous operating systems which is consists of real-time operating systems and general-purpose operating system. In order to solve this problem, we have attempted to reuse the performance analysis function in general-purpose operating system, thereby real-time operating systems can be analyzed along with general-operating system. Furthermore, we have implemented a prototype based on ARM Cortex-A15 dual-core processor. By using this integrated trace method, real-time system developers can be improved productivity and reliability of results on real-time virtualization environment.

• Journal of Computing Science and Engineering
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• v.7 no.2
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• pp.89-98
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• 2013

This paper presents a complete survey of recent techniques that are applied in the field of real-time Java computing. It focuses on the issues that are especially important for hard real-time applications, which include time predictable garbage collection, worst-case execution time analysis of Java programs, real-time Java threads scheduling and compiler techniques designed for real-time purpose. It also evaluates experimental frameworks that can be used for researching real-time Java. This overview is expected to help researchers understand the state-of-the-art and advance the research in real-time Java computing.

• Journal of the Korea Society of Computer and Information
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• v.11 no.4 s.42
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• pp.35-45
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• 2006

RIn this paper. we describe real-time parallel processing simulator developed for the use of performance analysis of rolling missiles. The real-time parallel processing simulator developed here consists of seeker emulator generating infrared image signal on aircraft, real-time computer, host computer, system unit, and actual equipments such as auto-pilot processor and seeker processor. Software is developed according to the design requirements of mathematic model, 6 degree-of-freedom module, aerodynamic module which are resided in real-time computer. and graphic user interface program resided in host computer. The real-time computer consists of six TI C-40 processors connected in parallel. The seeker emulator is designed by using analog circuits coupled with mechanical equipments. The system unit provides interface function to match impedance between the components and processes very small electrical signals. Also real launch unit of missiles is interfaced to simulator through system unit. In order to use the real-time parallel processing simulator developed here as a performance analysis equipment for rolling missiles, we perform verification test through experimental results in the field.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.13 no.9
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• pp.4429-4445
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• 2019

As low-power and low-rate WSNs are being widely used for industrial applications, the scheduling of such applications becomes a critical issue to guarantee meeting the stringent requirements of determinism and tight latencies. This paper studies the link scheduling problem for real-time industrial applications in time-slotted channel hopping (TSCH) networks. We propose a heuristic algorithm for centralized link scheduling referred to as path-collision aware least laxity first (PC-LLF) algorithm, which dynamically prioritizes the packets based on the laxity time to the end-to-end deadlines and the amount of collisions that messages might deal with along their designated paths to the destination device. We propose schedulability analysis of real-time applications scheduled under our prioritization approach over TSCH networks, based on the literature on real-time schedulability analysis of multiprocessors and distributed systems. We show that our methodology provides an improved schedulability condition with respect to the existing approaches. Performance evaluation studies quantify to quantify the performance of our proposed approach under a variety of scenarios.

• Journal of Computing Science and Engineering
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• v.9 no.4
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• pp.177-189
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• 2015

High-performance processors using Non-Uniform Cache Architecture (NUCA) are increasingly used to deal with the growing wire delays in multicore/manycore processors. Due to the convergence of high-performance computing with embedded computing, NUCA caches are expected to benefit high-end embedded systems as well. However, for real-time systems that use multicore processors with NUCA caches, it is crucial to bound worst-case execution time (WCET) accurately and safely. In this paper, we developed a WCET analysis approach by considering the effect of static NUCA caches on WCET. We compared the WCET in real-time applications with different topologies of static NUCA caches. Our experimental results demonstrated that the static NUCA cache could improve the worst-case performance of realtime applications using multicore processor compared to the cache with uniform access time.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.27 no.3
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• pp.43-49
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• 2013

Recently harmonics flowing into power system is increasing as the usage of semiconductor equipments and switching mode power equipments are increasing. Harmonics cause problems such as heat increasing and reduction in capacity of transformers, especially the harmonics flowing into a distribution transformer can lead to the lifetime reduction of transformer. In this paper, we are about to develop a device that can monitor harmonics in real-time as it is affixed to a distribution transformer. Unlike the existing expensive harmonic analysis device, a new harmonic analysis algorithm is proposed in order to implement low-cost equipment. The real-time harmonic analysis algorithm proposed in this paper allows implementation on low performance microcontrollers, thus it can monitor the harmonic in real-time as it is individually affixed to the transformer. Therefore, it would improve the reliability of the transformer and stable power system operation would be possible as it can prevent the transformer accidents in advance.