• The KIPS Transactions:PartD
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• v.10D no.3
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• pp.541-546
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• 2003

We present a random bit generator that uses fingerprint image as the source of random, and the random bit generator is the first generator in the world that uses biometric information for the source of random in the world. The generator produces, on the average, 9,334 bits a fingerprint image in 0.03 second, and the produced bit sequence passes all 16 statistical tests that are recommended by NIST for testing the randomness.

• Journal of information and communication convergence engineering
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• v.8 no.5
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• pp.539-543
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• 2010

We present a random bit generator that uses fingerprint image for the source of random, and random bit generator using fingerprint image for the randomness has not been presented as yet. Fingerprint image is affected by the operational environments including sensing act, nonuniform contact and inconsistent contact, and these operational environments make FPI to be used for the source of random possible. Our generator produces, on the average, 9,334 bits a fingerprint image in 0.03 second. We have used the NIST SDB14 test suite consisting of sixteen statistical tests for testing the randomness of the bit sequence generated by our generator, and as the result, the bit sequence passes all sixteen statistical tests.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.5 no.4
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• pp.321-325
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• 2004

It is quite difficult to create an unbiased and stable random bit stream, as required for statistical randomness, when using a random generator with only a hardware component. In this paper, we studied to reduce the statistical property of the biased bit stream in the output of a real random number generator. The proposed scheme is enhanced the randomness of output bitstream, these test items are used by FIPS 140-1.

• Journal of Korea Multimedia Society
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• v.4 no.2
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• pp.182-188
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• 2001

In this paper, We proposed a pseudo-random bit sequence generator based on the concept of n-dimensional cellular automata which is a method of analyzing dynamical systems. The proposed generator is designed for using and disusing key. And the key size is variable from 128 bits to 256 bits. The generator was estimated to generate 380Mbits/sec under Pentium MMX 200MHz (64M RAM, Windows 98).

• Journal of Digital Contents Society
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• v.8 no.4
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• pp.631-637
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• 2007

In this paper, I propose an adaptive cryptographic protocol which is basic protocol for fair exchange of secrets. For this, I investigate the verifiable oblivious transfer protocol based on discrete logarithm problem proposed by Lein Harn etc. And I propose a new adaptive cryptographic protocol that has the additional funtions on the existing method. This proposed method has the additional functions that enable to authenticate sender and to protect denial of what he/she has sent message to the other. To do this, I make use of bit commitment scheme using pseudo-random sequence generator.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.27 no.3
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• pp.449-457
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• 2017

In this paper, we analyze the security and performance of the Quantis Quantum random number generator in terms of cryptography through experiments. The Quantis' post-processing is designed to output full-entropy via bit-matrix-vector multiplication based on mathematical background, and we used the min-entropy estimating test of NIST SP 800-90B so as to verify whether the output is full-entropy. Quantis minimizes the effect on the random bit rate by using an optimization technique for bit-matrix-vector multiplication, and compared the performance to conditioning functions of NIST SP 800-90B by measuring the random bit rate. Also, we have distinguished what is in Quantis' post-processing to the standard model of NIST in USA and BSI in Germany, and in case of applying Quantis to cryptographic systems in accordance with the CMVP standard, it is recommended to use the output of Quantis as the seed of the approved DRBG.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.12 no.12
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• pp.6161-6176
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• 2018

Pseudorandom numbers are useful in cryptographic operations for using as nonce, initial vector, secret key, etc. Security of the cryptosystem relies on the secret key parameters, so a good pseudorandom number is needed. In this paper, we have proposed a new approach for generation of pseudorandom number. This method uses the three dimensional combinational puzzle Rubik Cube for generation of random numbers. The number of possible combinations of the cube approximates to 43 quintillion. The large possible combination of the cube increases the complexity of brute force attack on the generator. The generator uses cryptographic hash function. Chaotic map is being employed for increasing random behavior. The pseudorandom sequence generated can be used for cryptographic applications. The generated sequences are tested for randomness using NIST Statistical Test Suite and other testing methods. The result of the tests and analysis proves that the generated sequences are random.

• ETRI Journal
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• v.42 no.4
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• pp.518-526
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• 2020

This paper presents an efficient hardware random-number generator based on a beta source. The proposed generator counts the values of "0" and "1" and provides a method to distinguish between pseudo-random and true random numbers by comparing them using simple cumulative operations. The random-number generator produces labeled data indicating whether the count value is a pseudo- or true random number according to its bit value based on the generated labeling data. The proposed method is verified using a system based on Verilog RTL coding and LabVIEW for hardware implementation. The generated random numbers were tested according to the NIST SP 800-22 and SP 800-90B standards, and they satisfied the test items specified in the standard. Furthermore, the hardware is efficient and can be used for security, artificial intelligence, and Internet of Things applications in real time.

• Proceedings of the IEEK Conference
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• 2002.07c
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• pp.1984-1987
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• 2002

This paper describes the design and implementation of a single-chip digitally synthesized 0-35MHz agile function generator. The chip comprises an integrated direct digital synthesizer (DDS) with a 10-bit on- chip digital-to-analog converter (DAC) using an n-well single-poly triple-metal 0.5-$\mu\textrm{m}$ CMOS technology. The main features of the chip include maximum clock frequency of 100 MHz at 3.3-V supply voltage, 32-bit frequency tuning word resolution, 12-bit phase tuning word resolution, and an on-chip 10-bit DAC. The chip provides sinusoidal, ramp, saw-tooth, and random waveforms with phase and frequency modulation, and power-down function. At 100-MHz clock frequency, the chip covers a bandwidth from dc to 35 MHz in 0.0233-Hz frequency steps with 190-ns frequency switching speed. The complete chip occupies 12-mm$^2$die area and dissipates 0.4 W at 100-MHz clock frequency.

• The Transactions of the Korean Institute of Power Electronics
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• v.10 no.5
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• pp.501-507
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• 2005

This paper proposes a Hybrid Random PWM(HRPWM) technique using a LF2407 DSP board in order to spread the power spectra of an induction motor. The proposed method is composed to the PRBS (Pseudo-Random Binary Sequence) with the Lead-Lag random bit and the random triangular carrier for the logical comparison. Also, a DSP generates the random number, the PRBS and the three-phase reference signal, a MAX038 chip operating as frequency modulator generates the random triangular carrier. For verification of the proposed method, the experiments were conducted with a three-phase adjustable speed a.c drives, and the results of simulations and experiments are presented.