• The Transactions of The Korean Institute of Electrical Engineers
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• v.63 no.5
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• pp.713-718
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• 2014

DC urban railway power system consists of DC power network and AC power network. The DC power network supplies electric power to railway vehicles and the AC power network supplies electric power to station electric equipment. Recently, because of power consumption reduction and peak load shaving, intelligent measurement of regenerative energy and renewable energy adapted on DC urban railway is required. For this reason, DC smart metering system for DC power network shall be developed. Therefore, in this paper, DC voltage sensor, current sensor, and DC smart meter were developed and evaluated by performance test. DC voltage sensor was developed for measuring standard voltage range of DC urban railway, and DC current sensor was developed as hall effect split core type in order to install in existing system. DC smart meter possesses function of general intelligent electric power meter, such as measuring electricity and wireless communication etc. And, DC voltage sensor showed average 0.17% of measuring error for 2,000V/50mA, and current sensor showed average 0.21% of measuring error for ${\pm}2,000V/{\pm}4V$ in performance test. Also DC smart meter showed maximum 0.92% of measuring error for output of voltage sensor and current sensor. In similar environment for real DC power network, measuring error rate was under 0.5%. In conclusion, accuracy of DC smart metering system was confirmed by performance test, and more detailed performance will be verified by further real operation DC urban railway line test.

• The Journal of the Korea institute of electronic communication sciences
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• v.14 no.2
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• pp.309-316
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• 2019

In this paper, a low-jitter delay-locked loop that compensates for local clock skew is presented. The proposed DLL consists of a phase splitter, a phase detector(PD), a charge pump, a bias generator, a voltage-controlled delay line(VCDL), and a level converter. The VCDL uses self-biased delay cells using current mode logic(CML) to have insensitive characteristics to temperature and supply noises. The phase splitter generates two reference clocks which are used as the differential inputs of the VCDL. The PD uses the only single clock from the phase splitter because the PD in the proposed circuit uses CMOS logic that consumes less power compared to CML. Therefore, the output of the VCDL is also converted to the rail-to-rail signal by the level converter for the PD as well as the local clock distribution circuit. The proposed circuit has been designed with a $0.13-{\mu}m$ CMOS process. A global CLK with a frequency of 1-GHz is externally applied to the circuit. As a result, after about 19 cycles, the proposed DLL is locked at a point that the control voltage is 597.83mV with the jitter of 1.05ps.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.42 no.5
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• pp.1110-1116
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• 2017

Depending on the operating characteristics, track circuit is installed for the purpose of direct or indirect control of the signal device, point switch machine and other security device. These are mainly used for train detection, transmission of information, broken rail detection and transmission of return current. Especially, the return current is related to signal system, power system and catenary line, and track circuit systems. It is one of the most important component shall be dealt for the safety of track side staff and for the protection of railway-related electrical system according to electrification. Therefore, an accurate analysis of the return current is needed to prevent the return current unbalance and the system induced disorder and failure due to an over current condition. Also, if the malfunction occurred by the return current harmonics, it can cause problems including train operation interruption. In this paper, we presented measurement and analysis method at return current and it's harmonics by high speed train operation on the honam high speed line.