• Proceedings of the IEEK Conference
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• 2000.11b
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• pp.285-288
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• 2000

In this paper, we propose a Reed-Solomon decoder for the DVD Reed-Solomon(RS) product code based on new efficient euclid cell architecture suitable for Modified Euclid Algorithm. We synthesized the RS decoder using Hyundai 0.65um CMOS standard cell library and compared the performance of the decoder with one of the conventional architectures. The result shows that the proposed euclid cell use about 32% less symbol time.

• Journal of the Korean Institute of Telematics and Electronics
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• v.26 no.2
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• pp.10-17
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• 1989

The Berlekamp-Massey algorithm, the method of using the Euclid algorithm, and Fourier transforms over a finite field can be used for the decoding of Reed-Solomon codes (called RS codes). RS codes can also be decoded by the algorithm that was developed by Peterson and refined by the Gorenstein and Zierler. However, the decoding of RS codes using the Peterson-Gorenstein-Zieler algorithm offers sometimes computational or implementation advantages. The decoding procedure of the double-error correcting (31,27) Rs code over the symbol field GF ($2^5$) will be analyized in this paper. The complete analysis, gate array design, and implementation for encoder/decoder pair of (31.27)RS code are performed with a strong theoretical justification.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.18 no.10
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• pp.1495-1507
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• 1993

In this paper, an implementation of RS (Reed-Solomon) code decoder for CDP (Compact Disc Player) using microprogramming method is presented. In this decoding strategy, the equations composed of Newton's identities are used for computing the coefficients of the error locator polynomial and for checking the number of erasures in C2(outer code). Also, in C2 decoding the values of erasures are computed from syndromes and the results of C1(inner code) decoding. We pulled up the error correctability by correcting 4 erasures or less. The decoder contains an arithmetic logic unit over GF(28) for error correcting and a decoding controller with programming ROM, and also microinstructions. Microinstructions are used for an implementation of a decoding algorithm for RS code. As a result, it can be easily modified for upgrade or other applications by changing the programming ROM only. The decoder is implemented by the Logic Level Modeling of Verilog HDL. In the decoder, each microinstruction has 14 bits( = 1 word), and the size of the programming ROM is 360 words. The number of the maximum clock-cycle for decoding both C1 and C2 is 424.

• Journal of Navigation and Port Research
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• v.28 no.1
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• pp.23-29
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• 2004

This paper deals with Reed-Solomon Coding for EUROFIX system EUROFIX is an integrated navigation and communication system, which combines Differential GNSS and Loran-C EUROFIX transmits DGNSS(Differential Global Navigation Satellite Systems) (data by pulse position modulation of Loran-C pulses. Loran-C system is regarded as a satellite backup system in recent. And now, it is important to detect and correct much errors in communication systems. Error corrections or correction algorithm is actively studied nowadays because of this. In this paper, we study and design encoder and decoder of Reed Solomon Code using Finite Galois Field Fourier Transformation for error corrections in EUROFIX data transmission. Through extensive simulation, the designed Reed Solomon code is shown to be effective for error correction in EUROFIX data transmission.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2009.05a
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• pp.907-910
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• 2009

This paper is the FPGA Implementation of Reed-Solomon Encoder that is one of Error control Codes. Reed-Solomon codes are block-based error control codes with a wide range of applications in digital communications. RS codes are strong on burst errors because it process signals as symbol. We simulate this system using Matlab from Mathworks and design it using System Generator from Xilinx. We refer Matlab source in Implementation of Reed-Solomon Error Control Coding for Compressed Images by Simon Anthony Raspa.

• Proceedings of the IEEK Conference
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• 2001.06a
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• pp.113-116
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• 2001

Reed-Solomon(RS) code is the most powerful burst error correcting code. In Ois paper, the architecture for the adaptive RS encoder adaptable for multi QoS requirements or time-varying channel environments has been designed. In the adaptive RS code, the message length k and the error correction capability t are allowed to be variable so that the block length n is also variable. We proposed the architecture of the adaptive RS encoder by designing the optimal structure of Galois fields multiplier with comparison of fixed multiplier and variable multiplier. The proposed architecture is implemented in VHDL and verified with the simulation tool

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.49 no.1
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• pp.25-34
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• 2012

This paper presents a universal architecture for variable-length eight-parallel Reed-Solomon (RS) decoder for high-rate WPAN systems. The proposed architecture can support not only RS(255,239) code but various shortened RS codes. Moreover, variable-length architecture provides variable low latency for various shortened RS codes and the eight-parallel design also provides high data processing rate. Using 90-$nm$ CMOS standard cell technology, the proposed RS decoder has been synthesized and measured for performance. The proposed RS decoder can provide a maximum 19-$Gbps$ data rate at clock frequency 300 $MHz$.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.26 no.4B
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• pp.427-436
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• 2001

RS product codes are widely used in digital storage systems. There are lots of decoding strategies for product code for short-length RS codes. Unfortunately many of them cannot be applied to long-length RS product codes because of the complexity of decoder. This paper proposes new decoding strategies which can be used in long length RS product codes.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.36C no.1
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• pp.34-40
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• 1999

Reed-Solomon(RS) codes have been employed to correct burst errors in applications such as CD-ROM, HDTV, ATM and digital VCRs. For the decoding RS codes, the Berlekamp-Massey algorithm, Euclidean algorithm and modified Euclidean algorithm(MEA) have been developed among which the MEA becomes the most popular decoding scheme. We propose an efficient recursive cell architecture suitable for the MEA. The advantages of the proposed scheme are twofold. First, The proposed architecture uses about 25% less clock cycles required in the MEA operation than[1]. Second, the number of recursive MEA cells can be reduced, when the number of clock cycles spent in the MEA operation is larger than code word length n. thereby buffer requirement for the received words can be reduced. For demonstration, the MEA circurity for (128,124) RS code have been described and the MEA operation is verified through VHDL.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.37 no.7A
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• pp.503-511
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• 2012

In this paper, the performance analysis of telemetering method using delayed frame time diversity (DFTD) as the outer code and Reed-Solomon (RS) code as the inner code is described. DFTD is used to transmit a real-time frame together with a time-delayed frame which was saved in the memory during a defined period. The RS code as a kind of FEC (forward error correction) is serially concatenated with DFTD. This method was applied to the design of telemetry units that have been used for flight tests in a communication environment with deep fading. The data of the flight test for four cases with no applied code, with DFTD only, with the RS code only, and with both DFTD and the RS code are used to analyze the performance. The simulation for time-delay suggests the possibility that all frame errors can be removed. And the results of 12 flight tests show the performance superiority of this new method to compare with the RS code only.