• Proceedings of the KIEE Conference
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• 2007.10a
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• pp.387-388
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• 2007

IEEE 802.15.4a의 UWB(ultra-wide band) 방식에서 PHY(physical layer) 시스템에 사용되는 FEC(forward error correction)는 RS(Reed-Solomon) 조직적(systematic) 블록 부호와 1/2의 부호율을 가진 조직적 길쌈 부호의 연접 형태로 이루어져 있다.[1] UWB 신호를 이용한 시스템은 연속적이지 않은 임펄스(impulse) 기반의 신호를 사용하기 때문에 정밀도 면에서 뛰어난 장점을 가진다. 본 논문에서는 IEEE P802.15.4a 표준에 명시되어 있는 FEC를 구현하여 AWG(adaptive white gaussian noise) 채널에서의 SNR(signal to noise ratio)에 따른 BER(bit error rate)을 구함으로써 성능을 분석하였다. 실험에서의 정확한 결과를 얻기 위해 15.4a의 UWB에서의 변조 방식에 따라 신호를 변조한 후 잡음을 삽입하여 결과를 도출하였다.

• Journal of the Korean Institute of Telematics and Electronics S
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• v.36S no.9
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• pp.1-8
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• 1999

In this paper, we propose and analyze a concatenated coding scheme for DS/CDMA systems in asynchronous channels. In the concatenated coding, bandwidth efficient $2^{2L-2}$-state ${\frac{L}{L+1}}$-rate 2-MTCM with biorthogonal signal constellation is used for the inner code, and $(2^{L-1},\;{\lceil}\frac{2^{L-1}}{L/2}{\rceil})$ RS code is use for the outer code. It is shown that we can get considerable performance gain over the uncoded system without sacrificing the data transmission rate. The proposed system can be used as a coding scheme for reliable and high speed integrated information services of mobile communication systems.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.33 no.8A
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• pp.821-828
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• 2008

In this paper, we present an optimized design of RS(23,17) decoder for UWB, which uses the pipeline structured-modified Euclidean(PS-ME) algorithm. Firstly, the modified processing element(PE) block is presented in order to get rid of degree comparison circuits, registers and MUX at the final PE stage. Also, a degree computationless decoding algorithm is proposed, so that the hardware complexity of the decoder can be reduced and high-speed decoder can be implemented. Additionally, we optimize Chien search algorithm, Forney algorithm, and FIFO size for UWB specification. Using Verilog HDL, the proposed decoder is implemented and synthesized with Samsung 65nm library. From synthesis results, it can operate at clock frequency of 250MHz, and gate count is 17,628.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.35 no.2C
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• pp.139-147
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• 2010

A novel turbo coded modulation scheme, called turbo-APPM, for deep space optical communications is constructed. The constructed turbo-APPM is a serial concatenations of turbo codes, an accumulator and a pulse position modulation (PPM), where turbo codes act as an outer code while the accumulator and the PPM act together as an inner code. The generator polynomial and the puncturing rule for generating turbo codes are chosen to show the low bit error rate. At the receiver, the joint decoding is performed by exchanging soft information iteratively between the inner decoder and the outer decoder. In the outer decoder, a local iterative decoding for turbo codes is conducted before transferring soft information to the inner decoder. Poisson distribution is used to model the deep space optical channel. It is shown by simulations that the constructed turbo-APPM provides coding gains over all previously proposed schemes such as LDPC-APPM, RS-PPM and SCPPM.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.44 no.2
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• pp.22-28
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• 2007

High PAPR (peak-to-average power ratio) is a major drawback of OFDM (orthogonal frequency division multiplexing) signals. In this paper, a modified SLM (selective mapping) technique that uses erasure decoding of RS (Reed-Solomon) codes is presented. At the transmitter a set of phase sequences are multiplied such that some portions of check symbols in RS-coded OFDM data blocks are phase-rotated. At the receiver, RS decoding is performed with the phase-rotated check symbols being treated as erasures. Hence, there is no need to send side information about the phase sequence selected to transmit for the lowest PAPR. In addition, the estimation process for the selected phase sequence is no longer needed at the receiver, leading to improvement in terms of complexity and performance. To evaluate the performance of this technique, the CCDF (complementary cumulative distribution function) of PAPR, the BER (bit error rate) and the decoding failure probability are compared with those of the previous SLM techniques.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.30A no.3
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• pp.16-33
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• 1993

New decoding algorithm of double-error-correction Reed-Solmon codes over GF(2$^{8}$) for optical compact disks is proposed and decoding algorithm of RS codes with triple-error-correcting capability is presented in this paper. First of all. efficient algorithms for estimating the number of errors in the received code words are presented. The most complex circuits in the RS decoder are parts for soving the error-location numbers from error-location polynomial, so the complexity of those circuits has a great influence on overall decoder complexity. One of the most known algorithm for searching the error-location number is Chien's method, in which all the elements of GF(2$^{m}$) are substituted into the error-location polynomial and the error-location number can be found as the elements satisfying the error-location polynomial. But Chien's scheme needs another 1 frame delay in the decoder, which reduces decoding speed as well as require more stroage circuits for the received ocode symbols. The ther is Polkinghorn method, in which the roots can be resolved directly by solving the error-location polynomial. Bur this method needs additional ROM (readonly memory) for storing tthe roots of the all possible coefficients of error-location polynomial or much more complex cicuit. Simple, efficient, and high speed method for solving the error-location number and decoding algorithm of double-error correction RS codes which reudce considerably the complexity of decoder are proposed by using Hilbert theorems in this paper. And the performance of the proposed decoding algorithm is compared with that of conventional decoding algorithms. As a result of comparison, the proposed decoding algorithm is superior to the conventional decoding algorithm with respect to decoding delay and decoder complexity. And decoding algorithm of RS codes with triple-error-correcting capability is presented, which is suitable for error-correction in digital audio tape, also.

• Proceedings of the IEEK Conference
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• 2000.11b
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• pp.281-284
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• 2000

This paper describes design of a (32, 28) Reed Solomon decoder for optical compact disk with double error detecting and correcting capability. A variety of error correction codes(ECCs) have been used in magnetic recordings, and optical recordings. Among the various types of ECCs, Reed Solomon(RS) codes has emerged as one the most important ones. The most complex circuit in the RS decoder is the part for finding the error location numbers by solving error location polynomial, and the circuit has great influence on overall decoder complexity. We use RAM based architecture with Euclid's algorithm, Chien search algorithm and Forney algorithm. We have developed VHDL model and peformed logic synthesis using the SYNOPSYS CAD tool. The total umber of gate is about 11,000 gates.

• Proceedings of the IEEK Conference
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• 2003.07a
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• pp.549-552
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• 2003

In this paper, an efficient architecture of a versatile Reed-Solomon (RS) decoder is designed, where the message length k as well as the block length n can be variable. The decoder permits 3-step pipelined processing based on the modified Euclid's algorithm(MEA). A new architecture for the MEA is designed for variable values of error correcting capability t. To maintain the throughput rate with less circuitry, the MEA block uses both the recursive and the overclocking technique. The decoder can decode a codeword received not only in a burst mode, but also in a continuous mode. It can be used in a wide range of applications due to its versatility. A versatile RS decoder over GF(2$^{8}$ ) having the error-correcting capability of up to 10 has been designed in VHDL, and successfully synthesized in an FPGA chip.

• Proceedings of the KIEE Conference
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• 1999.07g
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• pp.3212-3214
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• 1999

RS(Reed-Solomon)부호는 오류 정정을 위한 채널 코딩기법중의 하나로 특히 연집 오류에 대해 강한 특성을 갖고 있으며, CD-P(Compact Disc Player), DAT(Digital Audio Tape). VTR, DVD(Digital Video Disc), 디지탈 TV 디코더등에서 사용되고 있다. 본 논문은 Galois Field, GF[$2^8$]상에서 (204. 188. 8)의 규격을 갖는 디지탈 TV용 RS 복호기의 구현에 관한 연구로 8개의 심볼 오류까지 정정 가능하다. 오증 계산은 16개의 오증 계산셀로 구성되어 지며, 오류 위치 다항식을 계산하는데 있어서는 Berlekamp-Massey 알고리즘을 사용한다. VHDL로 설계되어 Synopsys를 이용하여 검증 및 합성하였다.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.8 no.7
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• pp.1506-1511
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• 2004

The error control of digital transmission system is a very important subject because of the noise effects, which is very sensitive to transmission performance of the digital communication system It employs a modified Euclid's algorithm to compute the error-location polynomial and error-magnitude polynomial of input data. The circuit size is reduced by selecting the Modified Euclid's Algorithm with one Euclid Cell of mutual operation. And the operation speed of Decoder is improved by using ROM and parallel structure. The proposed Encoder and Decoder are simulated with ModelSim and Active-HDL and synthesized with Synopsys. We can see that this chip is implemented on Xilinx Virtex2 XC2V3000. A share of slice is 28%. nut speed of this paper is 45Mhz.