• Proceedings of the Korean Vacuum Society Conference
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• 2011.08a
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• pp.301-301
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• 2011

최근 고밀도 메모리 반도체의 재료와 빠른 응답을 요구하는 나노입자를 이용한 비휘발성 메모리 소자의 제작에 대한 연구가 활발히 진행되고 있다. 그에 따른 기존의 플래쉬 메모리가 가지는 문제점을 개선하기 위해서 균일하고 규칙적으로 분포하는 새로운 나노소재의 개발과 비휘발성, 고속 동작, 고집적도, 저전력 소자의 공정기술이 요구되고 있다. 또한 부유게이트에 축적되는 저장되는 전하량을 증가시키기 위한 새로운 소자구조 개발이 필요하다. 한편, 실리 사이드 계열의 나노입자는 금속 나노입자와 달리 현 실리콘 기반의 반도체 공정에서 장점을 가지고 있다. 따라서 본 연구에서는 화합물 중에서 비휘발성 메모리 장치의 전기적 특성을 향상 시킬 수 있는 실리사이드 계열의 바나듐 실리사이드(V3Si) 박막을 열처리 과정을 통하여 수 nm 크기의 나노입자로 제작하였다. 소자의 제작은 p-Si기판에 실리콘산화막 터널층(5 nm 두께)을 건식 산화법으로 성장 후, 바나듐 실리사이드 금속박막을 RF 마그네트론 스퍼터 시스템을 이용하여 4~6 nm 두께로 터널 베리어 위에 증착하고, 그 위에 초고진공 마그네트론 스퍼터링을 이용하여 SiO2 컨트롤 산화막층 (20 nm)을 형성시켰다. 여기서 V3Si 나노입자 형성을 위해 급속 열처리법으로 질소 분위기에서 800$^{\circ}C$로 5초 동안 열처리하여 하였으며, 마지막으로 열 기화 시스템을 통하여 알루미늄 전극(직경 200 ${\mu}m$, 두께 200 nm)을 증착하여 소자를 제작하였다. 제작된 구조는 금속 산화막 반도체구조를 가지는 나노 부유게이트 커패시터이며, 제작된 시편은 투사전자현미경을 이용하여 나노입자의 크기와 균일성을 확인했다. 소자의 전기적인 측정을 E4980A capacitor parameter analyzer와 Agilent 81104A pulse pattern generator system을 이용한 전기용량-전압 측정을 통해 전하저장 효과 및 메모리 동작 특성들을 분석하고, 열처리 조건에 따라 형성되는 V3Si 의 조성을 엑스선 광전자 분광법을 이용하여 확인하였다.

• Proceedings of the KIEE Conference
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• 2005.07c
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• pp.2146-2148
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• 2005

The 2.5GeV linac of the Pohang Light Source(PLS) is planed to be converted to a XFEL. The PAL XFEL requires a new 1.2-GeV linac that will be combined to the existing linac to increase a beam energy upto 3.7GeV. This stability is mainly determined by a low level RF drive system and klystron-modulators. The stability level of the modulator has to be improved 10 times better to meet the pulse stability of 0.02 %. The regulation methods such as traditional de-Qing and precision inverter charging technology are reviewed to find out suitable upgrade scheme of the modulators. In order to obtain electron beam of the consequently stability for XFEL linac, the pulse-to-pulse beam voltage regulation is less than +/-0.5%. To get the reliable stability of the modulator which is less than +/-0.2%, a charging section is improved in a modulator which has been operated with inverter power supply and de-Q'ing.

• Journal of Satellite, Information and Communications
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• v.7 no.1
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• pp.75-81
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• 2012

This study is to design the transmitter and receiver of short range UWB(Ultra Wide Band) imaging radar that is able to display high resolution radar image for front area of a UGV(Unmanned Ground Vehicle). This radar can help a UGV to navigate autonomously as it detects and avoids obstacles through foliage. The transmitter needs two transmitters to improve the azimuth resolution. Multi-channel receivers are required to synthesize radar image. Transmitter consists of high power amplifier, channel selection switch, and waveform generator. Receiver is composed of sixteen channel receivers, receiver channel converter, and frequency down converter, Before manufacturing it, the proposed architecture of transceiver is proved by modeling and simulation using several parameters. Then, it was manufactured by using industrial RF(Radio Frequency) components and all other measured parameters in the specification were satisfied as well.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.18 no.2
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• pp.456-477
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• 2024

With information technology's rapid development, the Internet faces serious security problems. Studies have shown that malware has become a primary means of attacking the Internet. Therefore, adversarial samples have become a vital breakthrough point for studying malware. By studying adversarial samples, we can gain insights into the behavior and characteristics of malware, evaluate the performance of existing detectors in the face of deceptive samples, and help to discover vulnerabilities and improve detection methods for better performance. However, existing adversarial sample generation methods still need help regarding escape effectiveness and mobility. For instance, researchers have attempted to incorporate perturbation methods like Fast Gradient Sign Method (FGSM), Projected Gradient Descent (PGD), and others into adversarial samples to obfuscate detectors. However, these methods are only effective in specific environments and yield limited evasion effectiveness. To solve the above problems, this paper proposes a malware adversarial sample generation method (PixGAN) based on the pixel attention mechanism, which aims to improve adversarial samples' escape effect and mobility. The method transforms malware into grey-scale images and introduces the pixel attention mechanism in the Deep Convolution Generative Adversarial Networks (DCGAN) model to weigh the critical pixels in the grey-scale map, which improves the modeling ability of the generator and discriminator, thus enhancing the escape effect and mobility of the adversarial samples. The escape rate (ASR) is used as an evaluation index of the quality of the adversarial samples. The experimental results show that the adversarial samples generated by PixGAN achieve escape rates of 97%, 94%, 35%, 39%, and 43% on the Random Forest (RF), Support Vector Machine (SVM), Convolutional Neural Network (CNN), Convolutional Neural Network and Recurrent Neural Network (CNN_RNN), and Convolutional Neural Network and Long Short Term Memory (CNN_LSTM) algorithmic detectors, respectively.

• Journal of the Microelectronics and Packaging Society
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• v.28 no.3
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• pp.1-7
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• 2021

In this paper, by embedding a bare-die chip-type drive amplifier into the PCB composed of ABF and FR-4, it implements an embedded active device that can be applied in 28 GHz band modules. The ABF has a dielectric constant of 3.2 and a dielectric loss of 0.016. The FR-4 where the drive amplifier is embedded has a dielectric constant of 3.5 and a dielectric loss of 0.02. The proposed embedded module is processed into two structures, and S-parameter properties are confirmed with measurements. The two process structures are an embedding structure of face-up and an embedding structure of face-down. The fabricated module is measured on a designed test board using Taconic's TLY-5A(dielectric constant : 2.17, dielectric loss : 0.0002). The PCB which embedded into the face-down expected better gain performance due to shorter interconnection-line from the RF pad of the Bear-die chip to the pattern of formed layer. But it is verified that the ground at the bottom of the bear-die chip is grounded Through via, resulting in an oscillation. On the other hand, the face-up structure has a stable gain characteristic of more than 10 dB from 25 GHz to 30 GHz, with a gain of 12.32 dB at the center frequency of 28 GHz. The output characteristics of module embedded into the face-up structure are measured using signal generator and spectrum analyzer. When the input power (P_in) of the signal generator was applied from -10 dBm to 20 dBm, the gain compression point (P_1dB) of the embedded module was 20.38 dB. Ultimately, the bare-die chip used in this paper was verified through measurement that the oscillation is improved according to the grounding methods when embedding in a PCB. Thus, the module embedded into the face-up structure will be able to be properly used for communication modules in millimeter wave bands.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.22 no.6
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• pp.1210-1230
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• 1997

In this paper, we suggest an architecture of DS/CDMA tranceiver composed of one pilot channel used as reference and multiple traffic channels. The pilot channel-an unmodulated PN code-is used as the reference signal for synchronization of PN code and data demondulation. The coherent demodulation architecture is also exploited for the reverse link as well as for the forward link. Here are the characteristics of the suggested DS/CDMA system. First, we suggest an interlaced quadrature spreading(IQS) method. In this method, the PN coe for I-phase 1st channel is used for Q-phase 2nd channels and the PN code for Q-phase 1st channel is used for I-phase 2nd channel, and so on-which is quite different from the eisting spreading schemes of DS/CDMA systems, such as IS-95 digital CDMA cellular or W-CDMA for PCS. By doing IQS spreading, we can drastically reduce the zero crossing rate of the RF signals. Second, we introduce an adaptive threshold setting for the synchronization of PN code, an initial acquistion method that uses a single PN code generator and reduces the acquistion time by a half compared the existing ones, and exploit the state machines to reduce the reacquistion time Third, various kinds of functions, such as automatic frequency control(AFC), automatic level control(ALC), bit-error-rate(BER) estimator, and spectral shaping for reducing the adjacent channel interference, are introduced to improve the system performance. Fourth, we designed and implemented the DS/CDMA MODEM to be used for variable transmission rate applications-from 16Kbps to 1.024Mbps. We developed and confirmed the DS/CDMA MODEM architecture through mathematical analysis and various kind of simulations. The ASIC design was done using VHDL coding and synthesis. To cope with several different kinds of applications, we developed transmitter and receiver ASICs separately. While a single transmitter or receiver ASC contains three channels (one for the pilot and the others for the traffic channels), by combining several transmitter ASICs, we can expand the number of channels up to 64. The ASICs are now under use for implementing a line-of-sight (LOS) radio equipment.