• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.27 no.12
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• pp.1069-1074
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• 2016

This paper presents a V-band two-stage power amplifier integrated circuit using TSMC 65 nm CMOS process. The simple input, output, and inter-stage matching networks based on passive components are integrated. By compensating for power gain characteristics using a pre-distortion technique, the linearity of the power amplifier was improved. The implemented two-stage power amplifier showed a power gain of 10.4 dB, a saturated output power of 9.7 dBm, and an efficiency of 20.8 % with a supply voltage of 1 V at the frequency band of 58.8 GHz.