• Title/Summary/Keyword: Power-Line Communications

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The Performance Analysis of DS/SSMA BPSK Correlation Receivers in Electric Power Line Channel (전력선 채널에서의 DS/SSMA BPSK 코릴레이션 수신기 성능에 관한 연구)

  • Kang, Byeong-Kwon;Cho, Chang-Gil;Cho, Kwan;Lee, Jae-Kyeong;Whang, Keum-Chan
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.17 no.9
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    • pp.972-981
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    • 1992
  • In this paper, the performance of linear and hard-limiting correlation receivers for DS/SSMA BPSK power line communication system is analyzed. Strong impulsive noise of power line is modeled with Chan's noise model, and the performance of both receivers is analyzed in terms of parameters such as ratio of power spectrum density of impulsive noise to that background noise, ratio in impulsive noise width th that of data bit, and interarrival time of impulsive noise. And also multiple access capacity is evaluated with Gaussian approximation of multiple access interference. The results of this analysis reveal that the performance of linear correlation receiver is superior to that of hard-limiting correlation receiver when $N_1/N_b$ is small and is close to 1. But the BER and the multiple access capacity of hard-limiting correlation receiver becomes better in comparison with linear correlation receiver as $N_1/N_b$ increases.

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Adaptive Power Control Algorithms by Considering Fairness (무선네트워크에서 공평성을 고려한 전력제어 알고리즘)

  • Kim, Deok-Joo;Kim, Sung-Wook
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.35 no.3A
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    • pp.225-230
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    • 2010
  • In this paper, we propose a new power control scheme to maximize the network throughput with fairness provisioning. Based on the game model, decisions in the scheme cooperatively and collaborate with each other to satisfy efficiency and fairness requirements. The simulation results demonstrate that proposed scheme has excellent network performance, while other schemes cannot offer such an attractive performance balance.

Design of K-band Array Antenna for Satellite Communications (위성통신을 위한 K- 벤드용 배열 안테나 설계)

  • Lee, Hyeon-Jin;Kim, Hyun-Chul
    • The Transactions of the Korean Institute of Electrical Engineers P
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    • v.60 no.4
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    • pp.167-171
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    • 2011
  • In this paper, $2{\times}4$ microstrip patch antenna are proposed to implement K-band satellite communications. The microstrip feed line are inset into the radiation patch to match input impedance. Also the same current in each elements are excited by Kirchhoff's low. The elements distance of proposed array antenna are optimized $0.8{\lambda}_g$ to minimize a mutual coupling and maximize a gain. A power divider network are employed to distribute T-junction divider. As result, the proposed antenna get gain of 14[dBi] at 10.525[GHz].

Stabilization Converter Design and Modeling of LEO Satellite Power Systems (저궤도 위성의 전력 시스템 안정화를 위한 모델링 및 제어)

  • Yun, Seok-Teak;Won, Young-Jin;Lee, Jin-Ho
    • Journal of Satellite, Information and Communications
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    • v.5 no.2
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    • pp.29-33
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    • 2010
  • Satellites industry has been developing with the commercial and military needs. Because power system of satellite is very important to survival operation and hard to test, increasing reliability is very critical. Due to LEO small satellites are very sensitive to power system, effective stabilization control is important. Therefore, this paper introduce methods for general modeling of power converting system which it can be used design of controller and analysis of external disturbance influences. In conclusion, a modeling of LEO small satellites power converting system and a possible guide line to design reliable controller which optimizing power converters of LEO small satellite are generated.

A Study on a High-Speed $mB_1Z$ Transmission Line Code (고속 $mB_1Z$ 전송로부호에 관한 연구)

  • 유봉선;원동호;김병찬
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.12 no.4
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    • pp.347-356
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    • 1987
  • This paper is to propose a new line code suitable for a high speed unipolar pulse transmission system, such as a high speed optical digital transmission system. The original information speed can be converted into the transmission speed $\frac{(m+1)}{m}$ by the speed converter. Then this code, named mBiZ code, is generated by means of an Exclusive NOR between the bit stream inserted a space into every m bits and the bit stream delayed by the time slot allocated a single bit at the output coded sequence. Therefore, a mBiZ code can reduce a redundancy in the line code for transmission and its conversion circuits can be devised easily. The mBiZ code can also suppress undesirable long consecuitive identical digits and make line code balance in the mark and space ratio. Therefore, high frequency and low frequency components in power spectrum of a mBiZ code can be suppessed.

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VDSL 가입자 전송기술 개발 및 표준화 동향

  • 강규민;임기홍
    • Information and Communications Magazine
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    • v.16 no.10
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    • pp.112-124
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    • 1999
  • 본 논문에서는 FTTC/VDSL (Fiber-to-the-Curb/Very High-speed Digital Subscriber Line) 전송시스템의 개발동향과 ANSI, ETSI, ITU등의 표준화 위원회에서 현재 진행중인 VDSL 시스템의 표준화 작업에 대해 기술하였다. 특히, POTS (Plain Old Telephone Service), BA-ISDA(Basic Access Integrated Services Digital Network), HDSL(High-rate Digital Subscriber Line), SDSL (Single-pair HDSL), ADSL(Asymmetric Digital Subscriber Line) 등의 다양한 xDSL (Digital Subscriber Line) 서비스들에서 발생하는 NEXT (Near-end Crosstalk)/FEXT (Far-end Crosstalk)와 같은 crosstalk를 최소화하기 위해 제안된 VDSL시스템의 주파수 대역과 PSD (Power Spectral Density) mask에 관해 설명하고, 순방향(down-stream) 채널과 역방향(upstream) 채널의 데이터 전송률이 대칭적인 VDSL전송시스템과 비대칭적인 VDSL 전송시스템 간의 주파수대역의 호환성 문제, RFI(Radio Frequency Interference) ingress/egress 문제의 해결 방안에 관해 기술하였다. 또한, 현재 VDSL Coalition과 VDSL Alliance 간에 논의 중인 VDSL 전송시스템의 변복조 방식에 관한 표준화 작업과정 및 순방향과 역방향에 할당될 band 개수에 따른 시스템 성능의 장단점 등에 관해 살펴보았다. 끝으로 현재 국내에서 개발되고 있는 FTTC/VDSL 전송시스템의 전체구조를 요약하고, 네트워크에서 가입자쪽으로 순방향 데이터 전송에 사용된 51.84 Mb/s 19-CAP (Carrierless Amplitude/Phase Modulation) 전송시스템과 가입자 댁내에서 네트워크 방향으로 역방향 데이터 전송에 사용된 1.62 Mb/s QPSK (Quadrature Phase Shift Keying) burst-mode TDMA (Time Division Multiple Access) 전송시스템 등의 동작 원리 및 구조를 기술하였다.

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Analysis on the Application of Railway Screening Effect in the Multi-conductor Line Solution of Induced Voltage to Telecommunication Lines by Electrified Traction System (전기철도에 의한 통신선 유도전압 다도체계산법상의 궤도효과 적용기술 분석)

  • Lee, Sang-Mu;Choi, Mun-Hwan;Cho, Pyoung-Dong
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.33 no.7B
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    • pp.601-607
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    • 2008
  • The induced voltages by AT power feeding system of electrified traction line to telecommunication line are calculated with the method of multi-conductor line solution in the CCITT Directives. There is a screening effect by railway line itself among various shielding factors against induction. It is the argue point whether the multi-conductor line solution contains the railway line effect since the calculation method does not show any expression about shielding factors. So this paper illuminates the mysterious question by reviewing the shielding factor principle on traction system, scrutinizing the Japanese bible about induction, analyzing the multi-conductor line solution itself, and comparing the result calculation considering the effect of railway screen. This paper concludes that multi-conductor line solution contains the screening effect of railway lines.

A Single-Chip Design of Two-Dimensional Digital Riler with CSD Coefficients (CSD 계수에 의한 이차원 디지탈필터의 단일칩설계)

  • 문종억;송낙운;김창민
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.21 no.1
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    • pp.241-250
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    • 1996
  • In this work, an improved architecture of two-dimensional digital filter(2D DF) is suggested, and then the filter is simulated by C, VHDL language and related layouts are designed by Berkeley CAD tools. The 2D DF consists of one-dimensional digital filters and delay lines. For one-dimensional digital filter(1D DF) case, once filter coefficients are represented by canonical signed digit formats, multiplications are exected by hardwired-shifting methods. The related bit numbers are handled to prevent picture quality degradation and pipelined adder architectures are adopted in each tap and output stage to speed up the filter. For delay line case, line-sharing DRAM is adopted to improve power dissipation and speed. The filter layout is designed by semi/full custom methods considering regularity and speed improvement, and normal operation is confirmed by simulation.

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Development of a Remote Dust Collector Bag Control System using Power Line Communication (전력선 통신을 이용한 원격 집진기 bag 제어 시스템 개발)

  • Kim, Jung-Sook
    • Journal of the Korea Society of Computer and Information
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    • v.15 no.4
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    • pp.91-98
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    • 2010
  • Advances in communications and control technology, the strengthening of the Internet, and the growing recognition of the urgency to reduce the risk and production cost are motivating the development of improvements in the traditional manufacturing industry. In this paper, we developed a remote dust collector bag control system which is a combination of advanced IT and traditional dust collector based on the event. At first, we made the A/D(Analog/Digital) converter using a micro processor because the differential pressure transmission, which is a sensor of the dust collector, produces analog volt data. A/D converter can provide RS-232 communication to connect with Power Line Communication(PLC) modem. And, n-bytes message format was defined for the efficient dust collector bag information transmission from a dust collector to a user. Also, we designed the data types to model the dust collector and the dust collector bag, and they were logically modeled using XML and object-oriented modeling method. In addition to that, we implemented the system for showing the dust collector bag exchange time exactly to users at real-time using various visual user interfaces.