• Title/Summary/Keyword: Power-Bus

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Low Voltage Swing BUS Driver and Interface Analysis for Low Power Consumption (전력소모 감소를 위한 저 전압 BUS 구동과 인터페이스 분석)

  • Lee Ho-Seok;Kim Lee-Sup
    • Journal of the Korean Institute of Telematics and Electronics C
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    • v.36C no.7
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    • pp.10-16
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    • 1999
  • This paper describes a low voltage swing bus driver using FCSR(Feedback Control Swing voltage Reduction) which can control bus swing voltage within a few hundred of mV. It is proposed to reduce power consumption in On-chip interface, especially for MDL(Merged DRAM Logic) architecture wihich has wide and large capacitance bus. FCSR operates on differential signal dual-line bus and on precharged bus with block controlling fuction. We modeled driver and bus to scale driver size automatically when bus environment is variant. We also modeled coupling capacitance noise(crosstalk) of neighborhood lines which operate on odd mode with parallel current source to analysis crosstalk effect in the victim-line according as voltage transition in the aggressor-line and environment in the victim-line. We built a test chip which was designed to swing 600mV in bus, shows 70Mhz operation at 3.3V, using Hyundai 0.8um CMOS technology. FCSR operate with 250Mhz at 3.3V by Hspice simulation.

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Integrated Generation and Transmission Expansion Planning Using Generalized Bender’s Decomposition Method

  • Kim, Hyoungtae;Lee, Sungwoo;Kim, Wook
    • Journal of Electrical Engineering and Technology
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    • v.10 no.6
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    • pp.2228-2239
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    • 2015
  • A novel integrated optimization method based on the Generalized Bender’s Decomposition (GBD) is proposed to combine both generation and transmission expansion problems. Most of existing researches on the integrated expansion planning based on the GBD theory incorporate DC power flow model to guarantee the convergence and improve the computation time. Inherently the GBD algorithm based on DC power flow model cannot consider variables and constraints related bus voltages and reactive power. In this paper, an integrated optimization method using the GBD algorithm based on a linearized AC power flow model is proposed to resolve aforementioned drawback. The proposed method has been successfully applied to Garver’s six-bus system and the IEEE 30-bus system which are frequently used power systems for transmission expansion planning studies.

The Modified Power Flow Analysis in a Sense of Economic Load Dispatch (발전기 동일 증분 비용 할당을 위한 변형된 조류계산)

  • Jang, Gwang-Soo;Lee, Sang-Ho;Hur, Don
    • The Transactions of the Korean Institute of Electrical Engineers A
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    • v.53 no.1
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    • pp.1-6
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    • 2004
  • This paper suggests an extended power flow analysis algorithm based on a modified economic load dispatch concept. Meaningfully, the proposed method makes it possible to perform the power flow analysis without a slack bus. And the 'equal incremental cost' rule which is obtained by economic load dispatch prior to power flow is maintained even during the proposed power flow analysis. In this paper, both 5 - bus and 14 - bus power systems are used to offer the theoretical accuracy and practical applications of this algorithm.

A Study on the Learning GUI for the Load Flow of Power System (전력조류계산을 위한 학습용GUI에 관한 연구)

  • Lee, Hee-Yeong
    • Proceedings of the KIEE Conference
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    • 2004.07e
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    • pp.27-29
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    • 2004
  • This paper presents improved teaching and learning Gill for easily analysis tool of load flow of power system. This GUI includes not only contingency analysis function, but also calculating power loss from transmission line flow. The Gill is friendly for study for power system operation and control because picture provide a better visualizing of relationships between input parameters and effect than a tabula type result. This Gill enables topology and the output data of load flow for line outages to be shown on same picture page. Users can input the system data for power flow on the the picture and can easily see the the result diagram of bus voltage, bus power, line flow. It is also observe the effects of different types of variation of tap, shunt capacitor, loads level, line outages. Proposed Gill has been studied on the Ward-Hale 6-Bus system.

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A Simple ESR Measurement Method for DC Bus Capacitor Using DC/DC Converter (DC/DC 컨버터를 이용한 DC Bus 커패시터의 간단한 ESR 측정 기법)

  • Shon, Jin-Geun;Kim, Jin-Sik
    • The Transactions of the Korean Institute of Electrical Engineers P
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    • v.59 no.4
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    • pp.372-376
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    • 2010
  • Electrolytic capacitors have been widely used in power electronics system because of the features of large capacitance, small size, high-voltage, and low-cost. Electrolytic capacitors, which is most of the time affected by aging effect, plays a very important role for the power electronics system quality and reliability. Therefore it is important to estimate the parameter of an electrolytic capacitor to predict the failure. The estimation of the equivalent series resistance(ESR) is important parameter in life condition monitoring of electrolytic capacitor. This paper proposes a simple technique to measure the ESR of an electrolytic capacitor. This method uses a switching DC/DC boost converter to measure the DC Bus capacitor ESR of power converter. Main advantage of the proposed method is very simple in technique, consumes very little time and requires only simple instruments. Simulation results are shown to verify the performance of the proposed method.

Computational Flow Analysis on Applicability of Vehicle-Induced Wind to Highway to Wind Power Generation (차량 유도풍 풍력발전 활용 가능성의 전산유동해석)

  • Kim, Hyun-Goo;Woo, Sang-Woo;Jang, Moon-Seok;Shin, Hyung-Ki
    • New & Renewable Energy
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    • v.4 no.4
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    • pp.30-36
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    • 2008
  • The possibility of whether the induced wind from a vehicle traveling on highway can be used in wind power generation has been verified through computational flow analysis. The bus which is presumed to accompany relatively strong and wide range of induced wind compared to passenger vehicles because of its wide frontal area has been set as the subject of research. In order to ensure the reliability of research, the flow analysis surrounding the bus on a flat road where median strip is not installed has been compared with a preceding research while the validity of grid system and interpretation method used in this research have been assured by a qualitative method. In case of the median strip type wind power generator system, because it has been verified that a strong streamwise wind speed (5 m/s) is derived from the contraction effect of flow passage between the bus and the median strip while maintaining a relatively consistent upwind wind speed (1.4 m/s) in vertical direction in the wake area after the bus passes by although the change of wind speed is intense, it was decided as having some possibility of wind power generation. In case of the traffic sign panel type wind power generator system installed at the upper top of highway, because the wind speed of 2 m/s level has been derived for a limited time only at a section equal to the length of the bus and a faint induced wind speed less than 0.5 m/s was shown at other regions, it was decided as having almost no possibility of wind power generation.

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The design of the Sliding Mode Controller of Voltage Bus Conditioner for a DC Power Distribution System with multiple parallel loads in the Electrical Vehicles (다중 병렬 부하를 갖는 전기 자동차의 DC 배전 시스템을 위한 Voltage Bus Conditioner의 슬라이딩 모드 제어기 설계)

  • Chang, Han-Sol;Jeon, Yong-Sung;La, Jae-Du;Kim, Young-Jo;Kim, Young-Seok
    • Proceedings of the KIEE Conference
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    • 2011.07a
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    • pp.1141-1142
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    • 2011
  • An electrical vehicle (EV) is a huge issue in the automotive industry. The EV have many electrical units: electric motors, batteries, converters, ets. The DC power distribution system (PDS) is essential for the EV. The DC PDS offers many advantages. However, multiple loads in the DC PDS may affect the severe instability on the DC bus voltage. Therefore, a voltage bus conditioner (VBC) may use the DC PDS. The VBC is used to mitigate the voltage transient on the bus. In this paper, sliding mode controller (SMC) is designed for the VBC of DC PDS in the EV. The simulation results by PISM simulation package are presented for validating the proposed control technique.

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The Design of the PI Compensator for a Voltage Bus Conditioner in the DC Distributed Power System (DC 배전시스템에서 Voltage Bus Conditioner를 위한 PI 보상기 설계)

  • Kim, Young-Seok;Seok, Bong-Jun;La, Jae-Du
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.59 no.12
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    • pp.2195-2201
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    • 2010
  • The VBC(Voltage Bus Conditioner) is a bidirectional DC-DC converter with the energy storage for damping the instability and any transients of bus voltage in the DC DPS(Distributed Power System). This paper presents the PI(Proportional Integration) controller for the VBC. The PI controller is not only damping the bus transient, but also keeping the storage voltage level. Matlab Simulink simulation and experimental results are presented by validity of the proposed control technique.

A Voltage Bus Conditioner for a High Voltage DC Power Distribution System using High Performance Hysteresis Control (고성능 히스테리 제어를 이용한 고전압 DC 전력시스템을 위한 Voltage Bus Conditioner)

  • La, Jae-Du
    • The Transactions of the Korean Institute of Electrical Engineers P
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    • v.56 no.2
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    • pp.90-98
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    • 2007
  • More and All-Electric Aircraft (AEA) carry many loads with varied functions. In particular, there may be large pulsed loads with short duty ratio, which can affect the normal operation of other loads. In this paper, a bi-directional converter with inductive storage is used as a voltage bus conditioner (VBC) to mitigate voltage transients on the bus. In addition, the constant frequency hysteresis control technique for a VBC is presented. A simple and fast prediction of the hysteresis band-width is implemented by the phase-lock loop control, keeping constant switching frequency. This technique offers the excellent dynamic response in load or parameter variation. The control performance is illustrated by simulated results with the SABER package, The proposed hysteresis control results in the shortest and the smallest excursions.

A study on the optimal load shedding scheme considering the voltage stability improvement (전압안정도 개선을 고려한 적정 부하차단 기법)

  • 이상중;김건중;김원겸;김용배
    • The Transactions of the Korean Institute of Electrical Engineers
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    • v.44 no.3
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    • pp.270-273
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    • 1995
  • This paper proposes an optimal load shedding algorithm by which the system loss can be minimized when the load shedding is unavoidable in case of severe contingency such as the outage of key generators or lines. Shedding load .DELTA.S = .DELTA.P + J.DELTA.Q(MVA) is performed on the weakest bus (on the view of voltage stability), step by step, by the priority of the I.DELTA. = SQRT(.lambda.$\_$P/$\^$2/ + .lambda.$\_$Q/$\^$2/) index given for each load bus, where .lambda.$\_$P/ and .lambda.$\_$Q/ are the sensitivity indices representing the system loss variation versus active and reactive power change of the bus load bus. All loads are assumed to be constant power loads for convenience. A 5 bus sample system proves the effectiveness of the algorithm proposed.