• Title/Summary/Keyword: Power loss reduction

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An Improvement Parallel to the Efficiency of Boost Converter for Power Factor Correction (PFC용 부스트 컨버터의 병렬화에 의한 효율 개선)

  • 전내석;장수형;전일영;박영산;안병원;이성근;김윤식
    • Proceedings of the Korean Society of Marine Engineers Conference
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    • 2001.11a
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    • pp.120-124
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    • 2001
  • A new technique for improving the efficiency of single-phase high-frequency boost converter is proposed. This converter includes an additional low-frequency boost converter which is connected to the main high-frequency switching device in parallel. The additional converter is controlled at lower frequency. Most of the current flows in the low-frequency switch and so, high-frequency switching loss is greatly reduced accordingly Both switching device are controlled by a simple method; each controller consists of a one-shot multivibrator, a comparator and an AND gate. The converter works cooperatively in high efficiency and acts as if it were a conventional high-frequency boost converter with one switching device. The proposed method is verified by simulation. This paper describes the converter configuration and design, and discusses the steady-state performance concerning the switching loss reduction and efficiency improvement.

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Chaotic Neural Networks for Optimal Reconfiguration in Distribution Systems (카오스 신경망을 이용한 배전계통 최적 구성)

  • Rhee, Sang-Bong;Kim, Kyu-Ho;Lee, Yu-Jeong;You, Seok-Ku
    • Proceedings of the KIEE Conference
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    • 2001.07a
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    • pp.279-281
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    • 2001
  • This paper presents a chaotic neural networks to solve the distribution feeder reconfiguration problem for loss reduction. Feeder reconfiguration problem is the determination of switching option that minimizes the power losses for a particular set of loads in distribution systems. A chaotic neural networks is used to determine the switching combinations, select the status of the switches, and find the best combination of switches for minimum loss. The proposed method has been tested on 32 bus system, and the results indicate that it is able to determine the appropriate switching options for optimal configuration.

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A Study on the Controllable Snubber for Switching Loss Reduction in Interleaved Fly-Back Converter (인터리브드 플라이 백 컨버터의 스위칭 손실 감소를 위한 제어형 스너버에 관한 연구)

  • Park, Chang-Seok;Jung, Tae-Uk
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.29 no.5
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    • pp.57-64
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    • 2015
  • This paper proposes a new switching algorithm for an controllable clamp snubber to improve the efficiency of a fly-back converter system. This system uses an controllable clamp method for the snubber circuit for the efficiency and reliability of the system. However, the active clamp snubber circuit has the disadvantage that system efficiency is decreased by switch operating time because of heat loss in resonance between the snubber capacitor and leakage inductance. To address this, this paper proposes a new switching algorithm. The proposed algorithm is a technique to reduce power consumption by reducing the resonance of the snubber switch operation time. Also, the snubber switch is operated at zero voltage switching by turning on the snubber switch before main switch turn-off. Experimental results are presented to show the validity of the proposed controllable clamp control algorithm.

Optimal Placement of Distributed Generators in Radial Distribution System for Reducing the Effect of Islanding

  • K, Narayanan.;Siddiqui, Shahbaz A.;Fozdar, Manoj
    • Journal of Electrical Engineering and Technology
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    • v.11 no.3
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    • pp.551-559
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    • 2016
  • The present trend of increasing the penetration levels of Distributed Generator (DG) in the distribution network has made the issue of Islanding crucial for the reliable operation of the network. The islanding, if not detected early may lead to the collapse of the system as it can drive the distribution system to the cascaded failure. In this paper, an extensive study of the effect of DG placement and sizing is performed by dividing the system into different zones to obtain a reduced effect of islanding. The siting and sizing of DG is carried out to improve the overall voltage profile or/and reduction in active power loss using two stage Genetic Algorithm (GA). In the first stage a basic knockout selection is considered and the best population is taken for next stage, where roulette selection for crossover and mutation is performed for optimal placement and sizing of DGs. The effect of the islanding, due to load variations is reduced by optimal siting and sizing of DG. The effectiveness of the proposed scheme is tested on the IEEE 33 and 69 radial bus systems and the results obtained are promising.

High Efficiency DC/DC converter using MOSFET and IGBT (MOSFET와 IGBT를 이용한 DC/DC 컨버터의 효율 증대)

  • Kwon H.N.;Jeon Y.S.;Ban H.S.;Choe G.H.;Bae J.H.
    • Proceedings of the KIPE Conference
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    • 2001.07a
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    • pp.520-524
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    • 2001
  • Recently, the demand of large capacity SMPS for industrial area is increasing. Full-bridge dc-dc converter with IGBT is most widely used for large capacity SMPS because IGBT has a low-conduction loss and large current capacity, But most large capacity Full-bridge do-dc converter using IGBT has low operating frequency because of switching loss at IGBT especially at turn-off by current tail and it's cause of relatively big converter size. MOSFET has low switching losses has been widely used for high frequency SMPS but it has a problem to apply to large capacity SMPS because it has large conduction resistance causing large on-time losses. In this paper, for reduction losses at switching device, MOSFET is applied at parallel with IGBT in full-bridge dc/dc converter.

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A PWM Control Strategy for Low-speed Operation of Three-level NPC Inverter based on Bootstrap Gate Drive Circuit (부트스트랩 회로를 적용한 3-레벨 NPC 인버터의 저속 운전을 위한 PWM 스위칭 전략)

  • Jung, Jun-Hyung;Ku, Hyun-Keun;Im, Won-Sang;Kim, Wook;Kim, Jang-Mok
    • The Transactions of the Korean Institute of Power Electronics
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    • v.19 no.4
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    • pp.376-382
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    • 2014
  • This paper proposes the pulse width modulation (PWM) control strategy for low-speed operation in the three-level neutral-point-clamped (NPC) inverters based on the bootstrap gate drive circuit. As a purpose of the cost reduction, several papers have paid attention to the bootstrap circuit applied to the three-level NPC inverter. However, the bootstrap gate driver IC cannot generate the gate signal to the IGBT for low-speed operation, because the bootstrap capacitor voltage decreases under the threshold level. For low-speed operation, the dipolar and partial-dipolar modulations can be the effective solution. However, these modulations have drawbacks in terms of the switching loss and THD. Therefore, this paper proposes the PWM control strategy to operate the inverter at low-speed and to minimize the switching loss and harmonics. The experimental results are presented to verify the validity on the proposed method.

A Study on the Method of preventing from Reduction of AF Track Circuit Signal Current on a Ferroconcrete Roadbed (철근콘크리트 도상에서 AF 궤도회로 신호전류 저감방지대책에 관한 연구)

  • Hong, Hyo-Sik;Yoo, Kwang-Kiun;Rho, Sung-Chan
    • Journal of the Korean Society for Railway
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    • v.13 no.5
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    • pp.500-503
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    • 2010
  • Until now, the track circuit with railroad which is a part of an electrical circuit wad used only for the detection of the train location, but as train speed is up to be higher, in order to overcome the limits of ground signal system the railway signal system has changed from the ground signal system to a cab signal system. The power source of the track circuit has also changed from a direct current or a high voltage impulse to an alternating current with high frequency which is a part of the audio frequency. To improve the maintenanability and according to the environment condition, the railway roadbed is rapidly changed to the ferroconcrete roadbed. In case of a track circuit to use an alternating current with high frequency as power source at a ferroconcrete roadbed, the characteristic of the track circuit is brought on a change from a loss of the magnetic combination instead of a leakage current from electric insulation which was caused by the reinforcing iron pod with lattice shape for durability. This paper is shown the influence and the loss of the signal current at AF track circuit on a ferroconcrete in the simulation sheets and presented a proposal for the preventive method from reduction of signal current.

Effect of Flocculant Injection Ratio in NIR (Near-Infrared Ray) Drying for BIO-SRF (Solid Recovered Fuel) of Swage Sludge (하수슬러지 BIO-SRF (Solid Recovered Fuel) 생산을 위한 NIR (Near Infrared Ray) 건조시 응집제 주입비율이 미치는 영향)

  • Lee, Kang-min;Lee, Seung-Won
    • Journal of Environmental Science International
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    • v.30 no.2
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    • pp.135-143
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    • 2021
  • This study executed evaluation of drying characteristics based on the polymer injection rate (8%, 10% and 12%) and the drying method[NIF(near-infrared ray). According to this study analyzed VS, VS/TS, and calorific value compared with 'the auxiliary fuel standard of the thermoelectric power plant and the combined heat & power plant'. The results are as follows. In the case of NIR, the VS was slightly changed at the early stage of the material preheating period and the constant drying rate period with low moisture evaporation. But VS reduction was shown higher as moisture was dried. In the case of non-digested sludge with high VS content, the VS reduction rate by drying was shown lower than that of digested sludge. As the flocculant injection rate increased, the VS loss due th drying was found to be small. Also, the higher the flocculant injection rate was the longer the drying time. Especially, in the case of the NIR drying equipment, as the moisture content of sewage sludge decreased(moisture content 20~40%), the loss of net VS also showed a tendency to increase sharply. It is shown that the high calorific value according to the drying time of the non-digested sludge was changed from 590 kcaℓ/kg to 3,005 kcaℓ/kg and from 539 kcaℓ/kg to 2,796 kcaℓ/kg.

CFD analysis of the Disk Friction Loss on the Centrifugal Compressor Impeller (원심 압축기의 임펠러 원판 마찰 손실에 대한 CFD 해석)

  • Kim, Hyun-Yop;Cho, Lee-Sang;Cho, Jin-Soo
    • Journal of the Korean Society for Aeronautical & Space Sciences
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    • v.39 no.7
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    • pp.596-604
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    • 2011
  • To improve the total efficiency of centrifugal compressor, it is necessary to reduce the disk friction loss, which is defined as the power loss. In this study, the disk friction loss due to the axial clearance and the surface roughness effect is analyzed and proposed the new empirical equation for the reduction of the disk friction loss. The rotating reference frame technique and the 2-equation k-${\omega}$ SST model using commercial CFD code FLUENT is used for the steady-state analysis of the centrifugal compressor impeller. According to CFD results, the disk friction loss of the impeller is more affected by the surface roughness than the change of the axial clearance. For the minimization of the disk friction loss on the centrifugal compressor impeller, the magnitude of the axial clearance should be designed to the same size compare with theoretical boundary layer thickness and the surface roughness should be minimized.

Design of Low Power CMOS LNA for using Current Reuse Technique (전류 재사용 기법을 이용한 저전력 CMOS LNA 설계)

  • Cho In-Shin;Yeom Kee-Soo
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.10 no.8
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    • pp.1465-1470
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    • 2006
  • This paper presents a design of low power CMOS LNA(Low Noise Amplifier) for 2.4 GHz ZigBee applications that is a promising international standard for short area wireless communications. The proposed circuit has been designed using TSMC $0.18{\mu}m$ CMOS process technology and two stage cascade topology by current reuse technique. Two stage cascade amplifiers use the same bias current in the current reused stage which leads to the reduction of the power dissipation. LNA design procedures and the simulation results using ADS(Advanced Design System) are presented in this paper. Simulation results show that the LNA has a extremely low power dissipation of 1.38mW with a supply voltage of 1.0V. This is the lowest value among LNAs ever reported. The LNA also has a maximum gain of 13.38dB, input return loss of -20.37dB, output return loss of -22.48dB and minimum noise figure of 1.13dB.