• 제목/요약/키워드: Power factor corrector

검색결과 37건 처리시간 0.022초

무손실 저항개념을 이용한 저전력 전원설비용 능동 역률보정기의 설계 (Design of Active Power Factor Corrector for Low Power Supply by Loss Free Resistor Concept)

  • 임영철;정영국;최찬학;나석환;이건식;장영학
    • 한국조명전기설비학회지:조명전기설비
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    • 제7권1호
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    • pp.30-36
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    • 1993
  • 본 연구는 정류기의 입력전류에 포함되어 있는 고조파성분을 제거하고 입력역률을 개선하기 위해 무손실 저항(Loss Free Resistor) 개념에 기본을 둔, PC, 가전기기 및 형광등용 전자안정기등과 같은 저전력 전원설비에 적합한 불연속 도통모드(DCM) 플라이백 방식의 능동역률 보정기의 등가회로모델 및 설계법을 제시하였다. 이 개념에 의하여 능동역률 보정기의 등가입력저항, 출력전력원 특성을 정확하게 나타낼 수 있었으며 또 설계방정식을 유도하여 능동역률 보정기를 설계 시험한 결과, 적은 부품으로 정류기의 입력교류 전류에 포함되어 있는 고주파를 제거하였고 따라서 0.98의 고입력역률의 정류를 할 수 있었다.

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Voltage Sag Detection Algorithm for Instantaneous Voltage Sag Corrector

  • Lee, Sang-Hoon;Choi, Jae-Ho
    • Journal of Power Electronics
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    • 제2권3호
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    • pp.162-170
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    • 2002
  • Voltage sag detection algorithm for voltage sag corrector is proposed in this paper. To quantify the standard of voltage unbalance under the faulted conditions, the 3-phase unbalanced voltages are decomposed into two balanced 3-phase symmetrical components of the positive and negative sequence voltages, which is defined by the magnitude factor (MF) and unbalance factor (UF). It is analyzed that MWF and UF values are given as the dc constant values even though under the voltage unbalance condition. This paper also proposes the control scheme of the instantaneous voltage sag corrector based on this detection algorithm. The validity of the proposed algorithm is verified through the EMTDC simulation and experiments.

A Novel Detection Algorithm for Instantaneous Voltage Sag Corrector Using Series Compensator

  • Lee, Sang-Hoon;Choi, Jae-Ho
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2001년도 Proceedings ICPE 01 2001 International Conference on Power Electronics
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    • pp.502-507
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    • 2001
  • This paper proposes a novel detection algorithm of faulted voltages under the unbalanced condition. To quantify the standard of unbalance under the faulted conditions, the 3-phase unbalanced voltages are decomposed into two balanced 3-phase symmetrical components of the positive and negative sequence voltages, which is defined by the magnitude factor (MF) and unbalance factor (MF). It is analyzed that MF and UF values are given as the dc constant values even though unbalance condition. This paper also proposes the control scheme of the instantaneous voltage sag corrector based on this detection algorithm. The validity of the proposed algorithm is verified through the EMTDC simulation and experiments.

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초고속 단상 BLDC 전동기의 고역률 전력 제어 방법 (High Power Factor Control of High-speed Single-phase BLDC Motor)

  • 이욱진;정부문
    • 전력전자학회논문지
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    • 제21권2호
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    • pp.144-149
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    • 2016
  • This paper presents a power control method of high-speed single-phase BLDC motor. Most electric appliances require a power factor corrector (PFC) to mitigate grid current harmonics. However, the reactive components and power semiconductors in the PFC increase system cost and dimension. In this paper, a new motor drive system for a high-speed single-phase BLDC motor is proposed, which can decrease grid current harmonics without PFC by directly manipulating motor power and eliminating bulky electrolytic dc-link capacitor. Given that the proposed motor power control method does not require motor current controller, no current sensor is necessary. Moreover, the proposed algorithms can be easily implemented using a low-cost micro-controller. The effectiveness of the proposed power control method is verified by experiments.

순시전압강하 보상기의 새로운 제어 기법 (A New Control Algorithm for Instantaneous Voltage Sag Corrector)

  • 이상훈;최재호
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2001년도 전력전자학술대회 논문집
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    • pp.172-176
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    • 2001
  • In this paper, a new detection algorithm of faulted voltages under the unbalanced condition and a control algorithm of the instantaneous voltage sag corrector (IVSC) are proposed. To quantify the unbalance under fault conditions, the voltages are decomposed into two balanced three-phase systems using the symmetrical components of positive and negative sequence voltages, which is defined by magnitude factor (MF) and unbalance factor (UF). New control algorithm based on MF and UF values for instantaneous voltage compensation are proposed and verified through the PSCAD/EMTDC simulation and experimental results.

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2단 역률보상회로를 구성하는 Interleaved 승압형 컨버터의 해석 및 설계 (Analysis and Design of Interleaved Boost Power Factor Corrector on Two Stage AC/DC PFC Converter)

  • 허태원;손영대;김동완;김춘삼;박한석;우정인
    • 대한전기학회논문지:전기기기및에너지변환시스템부문B
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    • 제52권7호
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    • pp.343-351
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    • 2003
  • In this paper, interleaved boost converter is applied as a first-stage converter in switch mode power supply. The first-stage converter plays a role to improve power factor. Interleaved Boost Power Factor Corrector(IBPFC) can reduce input current ripple as a single voltage control loop only without inner current loop, because input current is divided each 50% by two switching devices. Each converter cell is also operated in discontinuous current mode and inductor current of each converter is discontinuous. Total input current which is composed by each converter cell is continuous current. Thus, IBPFC is able to improve input current ripple. IBPFC operating in discontinuous current mode can be classified as six modes from switching state and be carried out state space averaging small signal modeling. A control transfer function is obtained according to the modeling. Not only steady-state characteristics but also dynamic characteristics is considered. Single voltage control loop is also constructed by the control transfer function. From experimental result, improvement of power factor and input current ripple are verified.

Interleaved 승압형 역률보상 컨버터의 해석 (Analysis of Interleaved Boost Power Factor Corrector)

  • 허태원;박지호;노태균;정재륜;김동완;우정인
    • 전기학회논문지P
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    • 제51권4호
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    • pp.186-192
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    • 2002
  • In this paper, interleaved boost power factor corrector(IBPFC) is applied as a pre-regulator in switch mode power supply. IBPFC can reduce input current ripple and effectively increase the switching frequency without increasing the switching losses, because input current is divided each 50% by two switching devices. IBPFC can be classified as three cases by duty ratio condition in continuous current mode and be carried out state space average modeling. According to the modeling, steady and transient state analysis is performed by steady elements and perturbation element. Control transfer function is derived for design of control system.

Scheme to Improve the Line Current Distortion of PFC Using a Predictive Control Algorithm

  • Kim, Dae Joong;Park, Jin-Hyuk;Lee, Kyo-Beum
    • Journal of Power Electronics
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    • 제15권5호
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    • pp.1168-1177
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    • 2015
  • This paper presents a scheme to improve the line current distortion of power factor corrector (PFC) topology at the zero crossing point using a predictive control algorithm in both the continuous conduction mode (CCM) and discontinuous conduction mode (DCM). The line current in single-phase PFC topology is distorted at the zero crossing point of the input AC voltage because of the characteristic of the general proportional integral (PI) current controller. This distortion degrades the line current quality, such as the total harmonic distortion (THD) and the power factor (PF). Given the optimal duty cycle calculated by estimating the next state current in both the CCM and DCM, the proposed predictive control algorithm has a fast dynamic response and accuracy unlike the conventional PI current control method. These advantages of the proposed algorithm lower the line current distortion of PFC topology. The proposed method is verified through PSIM simulations and experimental results with 1.5 kW bridgeless PFC (BLPFC) topology.

고전력밀도 AC/DC 어댑터의 설계 (Design of High Power Density AC/DC Adapter)

  • 이준영
    • 전력전자학회논문지
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    • 제15권4호
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    • pp.259-265
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    • 2010
  • 본 논문에서는 더 높은 에너지 효율을 요구하는 전자 기기들의 사용에 따른 고전력 밀도 AC/DC 어댑터의 구조를 제안한다. PFC (Power Factor Corrector) topology는 BCM (Boundary Conduction Mode)제어 방식을 적용한 Boost topology를 기본으로 하였으며, DC/DC topology는 주파수제어를 적용한 LLC 공진 컨버터를기본으로 하였다. 이는 반도체 소자 및 마그네틱 소자의 크기를 줄이는데 용이하다. 85W급 AC/DC adapter (18.5V/4.6A)를 설계하여 실험한 결과 $90V_{rms}$의 입력전압에서 90%의 효율과 $36W/in^3$의 전력밀도가 측정되었고 무부하시 전력 손실은 0.5W를 달성하였다.

원칩 마이컴을 이용한 형광등용 역률보상기 및 전자식 안정기의 동시제어 (Simultaneous Control of Power Factor Corrector and Electronic Ballast for Fluorescent Lamp Using One Chip Micom)

  • 박효식;한우용;이공희
    • 전기학회논문지P
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    • 제53권4호
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    • pp.166-170
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    • 2004
  • In this paper, it has been proposed the simultaneous control of PFC (power factor corrector) and electronic ballast for fluorescent lamp by one chip micro-controller. Boost DC-DC converter is adopted for PFC, and half bridge inverter for electronic ballast. It controls, simultaneously and independently, the boost DC-DC converter and the half bridge inverter. As PFC and electronic ballast are controlled by one chip micro-controller, it is possible to achieve the simpler and the cheaper controller for fluorescent lamp. Experimental results have shown the feasibility of the proposed simultaneous control of PFC and electronic ballast by one chip micro-controller.