• Title/Summary/Keyword: Power factor corrector

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Design of Active Power Factor Corrector for Low Power Supply by Loss Free Resistor Concept (무손실 저항개념을 이용한 저전력 전원설비용 능동 역률보정기의 설계)

  • 임영철;정영국;최찬학;나석환;이건식;장영학
    • The Proceedings of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.7 no.1
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    • pp.30-36
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    • 1993
  • A simple discontinuous conduction mode(DCM) flyback type active power factor corrector for low power supply resents an effective resistive load to its power input. It is therefore well suited as an inexpensive high power factor rectifier for office equipment. An equivalent circuit model for the Active Power Factor Corrector based on the "Loss Free Resistor" concept is presented. This simple model correctly describes the basic power processing properties of the Active Power Factor Corrector, including input port resistor emulation, output port power some characteristics.teristics.

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Voltage Sag Detection Algorithm for Instantaneous Voltage Sag Corrector

  • Lee, Sang-Hoon;Choi, Jae-Ho
    • Journal of Power Electronics
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    • v.2 no.3
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    • pp.162-170
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    • 2002
  • Voltage sag detection algorithm for voltage sag corrector is proposed in this paper. To quantify the standard of voltage unbalance under the faulted conditions, the 3-phase unbalanced voltages are decomposed into two balanced 3-phase symmetrical components of the positive and negative sequence voltages, which is defined by the magnitude factor (MF) and unbalance factor (UF). It is analyzed that MWF and UF values are given as the dc constant values even though under the voltage unbalance condition. This paper also proposes the control scheme of the instantaneous voltage sag corrector based on this detection algorithm. The validity of the proposed algorithm is verified through the EMTDC simulation and experiments.

A Novel Detection Algorithm for Instantaneous Voltage Sag Corrector Using Series Compensator

  • Lee, Sang-Hoon;Choi, Jae-Ho
    • Proceedings of the KIPE Conference
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    • 2001.10a
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    • pp.502-507
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    • 2001
  • This paper proposes a novel detection algorithm of faulted voltages under the unbalanced condition. To quantify the standard of unbalance under the faulted conditions, the 3-phase unbalanced voltages are decomposed into two balanced 3-phase symmetrical components of the positive and negative sequence voltages, which is defined by the magnitude factor (MF) and unbalance factor (MF). It is analyzed that MF and UF values are given as the dc constant values even though unbalance condition. This paper also proposes the control scheme of the instantaneous voltage sag corrector based on this detection algorithm. The validity of the proposed algorithm is verified through the EMTDC simulation and experiments.

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High Power Factor Control of High-speed Single-phase BLDC Motor (초고속 단상 BLDC 전동기의 고역률 전력 제어 방법)

  • Lee, Wook-Jin;Jung, Bumun
    • The Transactions of the Korean Institute of Power Electronics
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    • v.21 no.2
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    • pp.144-149
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    • 2016
  • This paper presents a power control method of high-speed single-phase BLDC motor. Most electric appliances require a power factor corrector (PFC) to mitigate grid current harmonics. However, the reactive components and power semiconductors in the PFC increase system cost and dimension. In this paper, a new motor drive system for a high-speed single-phase BLDC motor is proposed, which can decrease grid current harmonics without PFC by directly manipulating motor power and eliminating bulky electrolytic dc-link capacitor. Given that the proposed motor power control method does not require motor current controller, no current sensor is necessary. Moreover, the proposed algorithms can be easily implemented using a low-cost micro-controller. The effectiveness of the proposed power control method is verified by experiments.

A New Control Algorithm for Instantaneous Voltage Sag Corrector (순시전압강하 보상기의 새로운 제어 기법)

  • Lee, Sang-Hoon;Choi, Jae-Ho
    • Proceedings of the KIPE Conference
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    • 2001.07a
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    • pp.172-176
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    • 2001
  • In this paper, a new detection algorithm of faulted voltages under the unbalanced condition and a control algorithm of the instantaneous voltage sag corrector (IVSC) are proposed. To quantify the unbalance under fault conditions, the voltages are decomposed into two balanced three-phase systems using the symmetrical components of positive and negative sequence voltages, which is defined by magnitude factor (MF) and unbalance factor (UF). New control algorithm based on MF and UF values for instantaneous voltage compensation are proposed and verified through the PSCAD/EMTDC simulation and experimental results.

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Analysis and Design of Interleaved Boost Power Factor Corrector on Two Stage AC/DC PFC Converter (2단 역률보상회로를 구성하는 Interleaved 승압형 컨버터의 해석 및 설계)

  • 허태원;손영대;김동완;김춘삼;박한석;우정인
    • The Transactions of the Korean Institute of Electrical Engineers B
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    • v.52 no.7
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    • pp.343-351
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    • 2003
  • In this paper, interleaved boost converter is applied as a first-stage converter in switch mode power supply. The first-stage converter plays a role to improve power factor. Interleaved Boost Power Factor Corrector(IBPFC) can reduce input current ripple as a single voltage control loop only without inner current loop, because input current is divided each 50% by two switching devices. Each converter cell is also operated in discontinuous current mode and inductor current of each converter is discontinuous. Total input current which is composed by each converter cell is continuous current. Thus, IBPFC is able to improve input current ripple. IBPFC operating in discontinuous current mode can be classified as six modes from switching state and be carried out state space averaging small signal modeling. A control transfer function is obtained according to the modeling. Not only steady-state characteristics but also dynamic characteristics is considered. Single voltage control loop is also constructed by the control transfer function. From experimental result, improvement of power factor and input current ripple are verified.

Analysis of Interleaved Boost Power Factor Corrector (Interleaved 승압형 역률보상 컨버터의 해석)

  • Heo, Tae-Won;Park, Jee-Ho;Roh, Tae-Kyun;Chung, Jae-Lyoun;Kim, Dong-Wan;Woo, Jung-In
    • The Transactions of the Korean Institute of Electrical Engineers P
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    • v.51 no.4
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    • pp.186-192
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    • 2002
  • In this paper, interleaved boost power factor corrector(IBPFC) is applied as a pre-regulator in switch mode power supply. IBPFC can reduce input current ripple and effectively increase the switching frequency without increasing the switching losses, because input current is divided each 50% by two switching devices. IBPFC can be classified as three cases by duty ratio condition in continuous current mode and be carried out state space average modeling. According to the modeling, steady and transient state analysis is performed by steady elements and perturbation element. Control transfer function is derived for design of control system.

Scheme to Improve the Line Current Distortion of PFC Using a Predictive Control Algorithm

  • Kim, Dae Joong;Park, Jin-Hyuk;Lee, Kyo-Beum
    • Journal of Power Electronics
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    • v.15 no.5
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    • pp.1168-1177
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    • 2015
  • This paper presents a scheme to improve the line current distortion of power factor corrector (PFC) topology at the zero crossing point using a predictive control algorithm in both the continuous conduction mode (CCM) and discontinuous conduction mode (DCM). The line current in single-phase PFC topology is distorted at the zero crossing point of the input AC voltage because of the characteristic of the general proportional integral (PI) current controller. This distortion degrades the line current quality, such as the total harmonic distortion (THD) and the power factor (PF). Given the optimal duty cycle calculated by estimating the next state current in both the CCM and DCM, the proposed predictive control algorithm has a fast dynamic response and accuracy unlike the conventional PI current control method. These advantages of the proposed algorithm lower the line current distortion of PFC topology. The proposed method is verified through PSIM simulations and experimental results with 1.5 kW bridgeless PFC (BLPFC) topology.

Design of High Power Density AC/DC Adapter (고전력밀도 AC/DC 어댑터의 설계)

  • Lee, Jun-Young
    • The Transactions of the Korean Institute of Power Electronics
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    • v.15 no.4
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    • pp.259-265
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    • 2010
  • The proposed method offers an improved control method for high power density AC/DC adapter by using more energy efficient electrical equipments. Power factor corrector (PFC) topology is based on boost topology with boundary conduction mode (BCM) and DC/DC topology is based on LLC resonant converter, which helps to reduce size of the semiconductor and the magnetic devices. Test results with 85W AC/DC adapter (18.5V/4.6A) design shows that the measured efficiency is 90% at $90V_{rms}$ input voltage with power density of $36W/in^3$. It also shows low no load power consumption of about 0.5W.

Simultaneous Control of Power Factor Corrector and Electronic Ballast for Fluorescent Lamp Using One Chip Micom (원칩 마이컴을 이용한 형광등용 역률보상기 및 전자식 안정기의 동시제어)

  • Park, Hyo-Sik;Han, Woo-Yong;Lee, Gong-Hee
    • The Transactions of the Korean Institute of Electrical Engineers P
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    • v.53 no.4
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    • pp.166-170
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    • 2004
  • In this paper, it has been proposed the simultaneous control of PFC (power factor corrector) and electronic ballast for fluorescent lamp by one chip micro-controller. Boost DC-DC converter is adopted for PFC, and half bridge inverter for electronic ballast. It controls, simultaneously and independently, the boost DC-DC converter and the half bridge inverter. As PFC and electronic ballast are controlled by one chip micro-controller, it is possible to achieve the simpler and the cheaper controller for fluorescent lamp. Experimental results have shown the feasibility of the proposed simultaneous control of PFC and electronic ballast by one chip micro-controller.