• 대한전기학회:학술대회논문집
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• 대한전기학회 2004년도 하계학술대회 논문집 B
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• pp.923-925
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• 2004

A lot of conventional automotive components driven by mechanical power source are being replaced with electrical ones to comply with the demands of market and customer, therefore the amount of electric energy used in a vehicle will be increased continuously. The increment of electric power demand causes interest on new higher power system such as 42V Power Net, and furthermore necessity for development of energy storage device is highlighted recently. This paper present the design of the BLDC motor for electric air-conditioner in 42V system and compare with the characteristics of several type BLDC motor.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2001년도 Proceedings ICPE 01 2001 International Conference on Power Electronics
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• pp.193-197
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• 2001

This paper presents a novel circuit topology of the double two-switch forward type high frequency transformer linked soft-switching PWM DC-DC power converter with tapped inductor filters that can operate under a condition of the low peak voltage stress across the power semiconductor devices and lowered peak current stress through the transformer for some high power applications. This circuit topology of an interleaved two-switch forward soft-switching power converter is proposed in the order to minimize an idle circulating current due to the tapped inductor filter without of any additional active auxiliary resonant-assisted snubber circuits, such as active resonant DC link snubbers and AC link snubbers, active resonant commutation leg link snubbers. The unique advantages of this power converter are less power circuit components and power semiconductor devices, constant frequency PWM scheme, cost effective configuration and wider soft-switching PWM operation range under PWM power regulations load variations. The practical effectiveness of the proposed soft-switching converter circuit topology is tested by simulations and is proved by experimental results received from the 500W-100kHz breadboard setup.

• Journal of Power Electronics
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• 제13권5호
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• pp.746-756
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• 2013

The modularized subunit of an electronic power transformer (EPT) is a series connection of two H-bridge voltage-source converters and a DC-DC converter with a high-frequency isolation transformer (HFIT). On the basis of cascading and paralleling the modularized subunits, EPT can be used in high-voltage and large-current applications in the power system. This paper discusses the steady state analysis of the modularized subunit of EPT. Theoretical analysis considers the influences of the two H-bridge voltage-source converters on the two sides of the DC-DC converter. We deduce the formulas of the theoretical calculation on the internal electrical characteristics of EPT (e.g., the voltages of the DC-bus capacitor and the primary side peak current of the HFIT). This paper provides guidance on the design and selection of EPT key elements (e.g., the DC-bus capacitors and HFIT). Experimental results are obtained from a single subunit of a laboratory model rated at 962 V, 15 kVA. All calculations, simulations, and experiments confirm the theoretical analysis of the subunit of EPT.

• Journal of electromagnetic engineering and science
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• 제1권2호
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• pp.120-125
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• 2001

The capacity improvement in the DS-CDMA system can be obtained by allowing spectrum-overlap between adjacent channels. In this paper, an analysis for capacity improvement is newly considered according to the various chip waveforms in the partial spectrum-overlapped DS-CDMA system. Optimum-overlapping ratio is numerically found to obtain maximum capacity improvement for each chip waveform. Assuming the bandwidth containing 95% of the total power, i.e., 95% power bandwidth, rectangular chip waveform has the largest capacity improvement in the considered chip waveforms and then the amount of improvement is 136.5% at overlapping ratio 1.5 for BER = $10^{-3}$TEX> . Furthermore, as the required BER becomes lower, the capacity improvement gets smaller for a1l of chip waveforms. For the unequal power channels, it is shown that the larger capacity improvement is achieved as the power of desired channel becomes larger than that of adjacent channels. And the capacity improvement can be obtained even though the desired channel power is lower than the adjacent channel power.

• KIEE International Transactions on Electrophysics and Applications
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• 제4C권3호
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• pp.91-95
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• 2004

The pulsed power system is widely available for use in pulse generator applications. Generally, the pulse generator is required for very short pulse width and high peak value. We have designed and fabricated our own pulsed type power system and through its use, we investigated microbe removal characteristics. This paper introduces a simple pulsed power system for removing various microbes caused by dirty water. This system includes a 2 times power supply circuit, IR2110 operated by using a fixed voltage regulator 7812 and 7805, and the switching MOSFET (Metal Oxide Semiconductor Field Effect Transistor). We can also control this process by using a PIC one chip microprocessor. As a result, we can obtain good removing characteristics of various microbes by adjusting the charging voltage, the pulse repetition rate and the electrical field inducing time.

• 한국초전도ㆍ저온공학회논문지
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• 제9권3호
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• pp.57-61
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• 2007

The current limiting characteristics of hybrid SFCL with additional power electronic devices was investigated in order to improve operation reliabilities. The hybrid SFCL developed consists of a superconducting trigger (S/T) part, a fast switch (F/S) module and a current limiting (C/L) part. Although hybrid SFCL had shown a excellent current limiting characteristics, this device was rather vulnerable to the residual arc currents which could exist during fast switch operation. This undesirable arc should be extinguished as quickly as possible in order to implement perfect fault current commutation. So, in order to eliminate the residual arcs between fast switch contacts, the power electronic devices (IGBT or GTO) were connected in series between the S/T part and the interrupter of the F/S module. According to the fault tests conducting with an input voltage of $270\;V_{rms}$ and a fault current of $5\;kA_{rms}$, The power electronic devices could perfectly remove the arc generated between the contacts of the interrupter within 4 ms after the fault occurred. From the test analysis, it was confirmed that the hybrid SFCL could enhance the operation reliability by adopting additional power electronic devices.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2009년도 춘계학술대회 논문집 에너지변화시스템부문
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• pp.131-135
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• 2009

This paper reviews the characteristics of Power MOSFET device technology that are leading to improvements in power loss for power electronic system. The silicon bipolar power transistor has been displaced by silicon power MOSFET's in low and high voltage system. The power electronic technology requires the marriage of power device technology with MOS-gated device and bipolar analog circuits.

• Journal of international Conference on Electrical Machines and Systems
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• 제3권4호
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• pp.451-457
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• 2014

Parallel operation systems have an advantage in that they can be constructed quickly and inexpensively by combining existing electric power converters. However, in this case, there is a peculiar problem in that a cross current flows between the electric power converters. To design a control system more simply and commonalize the core of combination reactors, we reviewed a system construction method for parallel operation systems constructed with three electric power converters.

• 전력전자학회논문지
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• 제21권3호
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• pp.191-199
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• 2016

Conventional two-level Zeta converters have drawbacks, such as high voltage stresses and high current ripples. To address these problems, a three-level Zeta converter that uses a couple inductor is proposed in this study. The proposed converter utilizes the three-level power switching circuit to reduce the voltage stresses and inductor current ripples. Compared with the conventional converter, the proposed converter can improve power efficiency and power density. A 500 W prototype circuit is used to verify the operation and performance of the proposed converter via experimental results.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2011년도 전력전자학술대회
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• pp.161-162
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• 2011

높은 승압비를 위한 기존의 탭인덕터 부스트 컨버터는 스위치의 턴-온/오프 시 기생 소자의 공진에 의해 발생하는 스위치 및 다이오드의 큰 전압 스트레스를 해결하기 위해 손실 스너버를 적용하였고, 이로 인해 효율 저하 및 원가 상승의 문제점이 있었다. 본 논문에서는 이러한 문제점을 해결할 수 있는 고효율의 부스트 컨버터를 제안한다. 제안된 회로는 트랜스포머를 사용하여 높은 승압비를 달성하고, 각 소자의 내압을 링크전압 또는 출력전압으로 제한하여 고효율 저가격화 및 신뢰성 개선에 매우 유리하다. 최종적으로 제안회로의 입력 DC24V 및 출력 DC230V인 모의실험을 통해 고찰된 실험결과를 제시함으로써 제안 회로의 우수성과 이론적 분석의 타당성을 검증한다.