• Journal of IKEEE
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• v.26 no.3
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• pp.422-429
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• 2022

A light sensor chip requires a small capacity eFuse (electrical fuse) OTP (One-Time Programmable) memory IP (Intellectual Property) to trim analog circuits or set initial values of digital registers. In this paper, 128-bit eFuse OTP IP is designed using only 3.3V MV (Medium Voltage) devices without using 1.8V LV (Low-Voltage) logic devices. The eFuse OTP IP designed with 3.3V single MOS devices can reduce a total process cost of three masks which are the gate oxide mask of a 1.8V LV device and the LDD implant masks of NMOS and PMOS. And since the 1.8V voltage regulator circuit is not required, the size of the illuminance sensor chip can be reduced. In addition, in order to reduce the number of package pins of the illumination sensor chip, the VPGM voltage, which is a program voltage, is applied through the VPGM pad during wafer test, and the VDD voltage is applied through the PMOS power switching circuit after packaging, so that the number of package pins can be reduced.

• Journal of Powder Materials
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• v.31 no.1
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• pp.16-22
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• 2024

Composite-based piezoelectric devices are extensively studied to develop sustainable power supply and self-powered devices owing to their excellent mechanical durability and output performance. In this study, we design a lead-free piezoelectric nanocomposite utilizing (Ba_0.85 Ca_0.15)(Ti_0.9Zr_0.1)O₃ (BCTZ) nanomaterials for realizing highly flexible energy harvesters. To improve the output performance of the devices, we incorporate porous BCTZ nanowires (NWs) into the nanoparticle (NP)-based piezoelectric nanocomposite. BCTZ NPs and NWs are synthesized through the solid-state reaction and sol-gel-based electrospinning, respectively; subsequently, they are dispersed inside a polyimide matrix. The output performance of the energy harvesters is measured using an optimized measurement system during repetitive mechanical deformation by varying the composition of the NPs and NWs. A nanocomposite-based energy harvester with 4:1 weight ratio generates the maximum open-circuit voltage and short-circuit current of 0.83 V and 0.28 ㎂, respectively. In this study, self-powered devices are constructed with enhanced output performance by using piezoelectric energy harvesting for application in flexible and wearable devices.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.14 no.3
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• pp.541-546
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• 2010

The push-push DRO(dielectric resonator oscillator) using a multi-layer structure of LTCC(low temperature co-fired ceramic) fabrication is designed. After the single DRO of series feedback type in the center frequency of 8GHz is designed, the push-push DRO in the center frequency of 16GHz including the Wilkinson power combiner is designed. The bias circuit affecting the size of oscillator are embedded in the intermediate layer of the LTCC multi-layer substrate. As a result, the large reduction in the size of VCO is obtained compared to the general oscillator on the single layer substrate. Experimental results show that the fundamental and third harmonics suppression are above 15dBc and 25dBc, respectively, and phase noise characteristics of the push-push DRO presents performance of -102dBc/Hz@100KHz and -128dBc/Hz@1MHz offset frequencies from carrier.

• Journal of Korea Society of Industrial Information Systems
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• v.18 no.5
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• pp.1-8
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• 2013

This paper presents a variable gain amplifier(VGA) without passive devices. This VGA employes the architecture of current feedback amplifier and variable gain can be achieved by using the GM ratios of two trans-conductance(gm) circuits. To obtain linearity and high gain, it uses current division technique and source degeneration in feedback GM circuits. Input trans-conductance(GM) circuit was biased by using a tunable voltage controller to obtain variable gain. The prototype of the VGA is designed in $0.35{\mu}m$ CMOS technology and it is operating in sub-threshold region for low power consumption. The the gain of proposed VGA is varied from 23dB to 43dB, and current consumption is $2.82{\mu}A{\sim}3{\mu}A$ at 3.3V. The area of VGA is 1$120{\mu}m{\times}100{\mu}m$.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.35 no.7B
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• pp.1081-1090
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• 2010

$0.18{\mu}m$ CMOS UHF RFID tag frontend is presented in this paper. Several key components are highlighted: the voltage multiplier based on the threshold voltage terminated circuit, the demodulator using current mode, and the clock generator. For standard compliance, all designed components are under the EPC Global Class-1 Generation-2 UHF RFID protocol. Backscatter modulation uses the pulse width modulation scheme. Overall performance of the proposed tag chip was verified with the evaluation board. Prototype Tag Chip dimension is neary 0.77mm2 ; According to the simulation results, the reader can successfully interrogate the tag within 1.5m. where the tag consumes the power about $71{\mu}W$.

• Proceedings of the IEEK Conference
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• 2004.06b
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• pp.335-338
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• 2004

We suggest Q-band MEMS MIMIC (Millimeter wave Monolithic Integrated Circuit) HEMT Oscillator using DAML (Dielectric-supported Airgapped Mcrostrip Line) structure. We elevated the signal lines from the substrate using dielectric post, in order to reduce the substrate dielectric loss and obtain low losses at millimeter-wave frequency. These DAML are composed with heist of $10\;{\mu}m$ and post size with $20\;{\mu}m\;{\times}\;20\;{\mu}m$. The MEMS oscillator was successfully integrated by the process of $0.1\;{\mu}m$ GaAs PHEMTs, CPW transmission line and DAML. The phase noise characteristic of the MEMS oscillator was improved more than 7.5 dBc/Hz at a 1 MHz offset frequency than that of the CPW oscillator And the high output power of 7.5 dBm was measured at 34.4 GHz.

• Journal of the Institute of Electronics and Information Engineers
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• v.53 no.7
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• pp.56-63
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• 2016

This paper presents a novel method for detecting a ghost key at the membrane type keyboard, which has additional resistive coating to the membrane film. Also, the optimal ratio of resistances for detecting a ghost key was designed based on the characteristics of the membrane film. The optimal ratio of resistances was considered to be able to detect the worst case (i.e., difference voltage between normal key and ghost key is minimum). The ability of the proposed methods are evaluated by simulation studies in this paper. In order to verify the proposed method, the experiment was carried out with a designed circuit and A/D (analog to digital) in MCU (micro controller unit). The proposed method is implemented into the membrane type keyboard and is verified by experimental results.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.20 no.8
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• pp.770-776
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• 2009

We propose and demonstrate an I/Q demodulator using four-port BPSK demodulator base on additive mixing and reflection-type phase shifter using hybrid technique. Previously, the conventional I/Q demodulator base on multiplicative or additive mixing method divides I/Q signal path from mixer to parallel-to-serial converter. In this paper, we propose new I/Q demodulator without dividing I/Q baseband signal path. The proposed schematic requires half size in implementation and half power consumption in baseband path compared with the conventional receiver. Also, the proposed receiver eliminates parallel-to-serial converter after data decoding. The proposed circuit has been successfully demodulated a QPSK signal with the L-band carrier frequency and 20 Mbps data rate.

• The Journal of the Korea institute of electronic communication sciences
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• v.10 no.10
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• pp.1123-1130
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• 2015

Network on a chip(NoC) is a communication subsystem between intellectual property(IP) cores in a SoC and improves high performance in the scalability and the power efficiency compared with conventional buses and crossbar switches. NoC needs a synchronizer to overcome the metastability problem between data links. This paper presents a new mesochronous synchronizer(MS) which is composed of selection window generator, selection signal generator, and data buffer. A delay line circuit is used to build selection window in selection window generator based on the delayed clock cycle of transmitted clock and the transmitted clock is compared with local clock to generate a selection signal in the SW(selection window). This MS gets rid of the restriction of metastability by choosing a rising edge or a falling edge of local clock according to the value of selection signal. The simulation results show that the proposed MS operates correctly for all phase differences between a transmitted clock and a local clock.

• Journal of Biosystems Engineering
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• v.43 no.2
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• pp.94-102
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• 2018

Purpose: In this study, a maintenance free super-capacitor battery charging system based on the photovoltaic module, to be used in agricultural electric carriers, was developed and its charging characteristics were studied in detail. Methods: At first, the electric carrier system configuration is introduced and the electric control components are presented. The super-capacitor batteries and photovoltaic module used in the experiment are specified. Next, the developed charging system consisting of a constant current / constant voltage Buck converter as the charging device and a super-capacitor cell as a balancing device are initiated. The proposed circuit design, a developed PCB layout of each device and a proportional control to check the current and voltage during the charging process are outlined. An experiment was carried out using a developed prototype to clarify the effectiveness of the proposed system. A power analyzer was used to measure the current and voltage during charging to evaluate the efficiency of the energy storage device. Finally, the conclusions of this research are presented. Results: The experimental results show that the proposed system successfully controls the charging current and balances the battery voltage. The maximum voltage of the super-capacitor battery obtained by using the proposed battery charger is 16.2 V, and the maximum charging current is 20 A. It was found that the charging time was less than an hour through the duty ratio of 95% or more. Conclusions: The developed battery charging system was successfully implemented on the agricultural electric carriers.