• Journal of the Institute of Electronics Engineers of Korea SD
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• v.41 no.8
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• pp.93-98
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• 2004

A low power SRAM using elevated source level memory cells is proposed to save the write power of SRAM. It reduces the swing voltages of the bit lines and data bus by elevating the source level of the memory cells from GND to $V_{T}$ and lowering the precharge level of the bit lines and data bus from $V_{DD}$ to $V_{DD}$ - $V_{T}$. It saves the write power of SRAM without area overhead and speed degradation. An SRAM with 8K${\times}$32bits is fabricated in a 0.25um CMOS process. It saves 45% of the power in write cycles at 300MHz with 2.5V. The maximum operating frequency is 330MHz.

• The Journal of the Korea Contents Association
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• v.8 no.3
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• pp.25-31
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• 2008

We propose a low power level-up/down shifter with single supply that can be used at SoC with multiple supply. The proposed circuit interfaces IPs which are operated on the different supply voltages. The circuit is designed with a single supply that decreases the low power consumption and the complexity of supply routing and layout. The proposed circuit operated at 500MHz for level-up and at 1GHz for level-down. The level-up/down shifter improves noise immunity of the system at I/O circuit. The circuit is evaluated for 1.8V, 2.5V, 3.3V supply with 0.18um CMOS technology, respectively.

• Journal of Power Electronics
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• v.16 no.3
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• pp.1176-1189
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• 2016

In this paper, a novel quasi-direct power control (Q-DPC) scheme based on a resonant frequency adaptive proportional-resonant (PR) current controller with a variable frequency resonant phase locked loop (RPLL) is proposed, which can achieve a fast power response with a unity power factor. It can also adapt to variations of the generator frequency in T-type Three-level shaft synchronous generator (SSG) converters. The PR controller under the static α-β frame is designed to track ac signals and to avert the strong cross coupling under the rotating d-q frame. The fundamental frequency can be precisely acquired by a RPLL from the generator terminal voltage which is distorted by harmonics. Thus, the resonant frequency of the PR controller can be confirmed exactly with optimized performance. Based on an instantaneous power balance, the load power feed-forward is added to the power command to improve the anti-disturbance performance of the dc-link. Simulations based on MATLAB/Simulink and experimental results obtained from a 75kW prototype validate the correctness and effectiveness of the proposed control scheme.

• The Transactions of the Korean Institute of Electrical Engineers B
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• v.48 no.1
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• pp.34-41
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• 1999

A three-level ZCT(Zero Current Transition) IGBT inverter is presented for high power IGBT inverters. The concept of ZCT for the conventional boost converter is extended to the three-level inverter. Moreover, in order to improve the reliability of inverter, midpoint charge balance problem of the three-level inverter is analyzed with respect 150kw, 20kHz prototype are presented to verify the principle of ZCT Operation.

• Proceedings of the KIPE Conference
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• 2017.07a
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• pp.270-271
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• 2017

Cascaded NPC/H-bridge 인버터의 기존 Level-Shift PWM에서는 한 stack에서 전력 및 손실 불균형이 발생하게 된다. 이에 따라 손실 불균형을 개선하기 위해 새로운 Level Shift PWM을 개발하였고, PSIM 9.14를 통해 기존의 PWM 기법들과 비교 분석 하였다.

• Journal of Electrical Engineering and information Science
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• v.1 no.2
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• pp.109-118
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• 1996

This paper deals with a new multi-level high voltage source inverter with GTO Thyristors. Recently, a multi-level approach seems to be the best suited for implementing high voltage conversion systems because it leads to harmonic reduction and deals with safe high power conversion systems independent of the dynamic switching characteristics of each power semiconductor device. A conventional multi-level inverter has some problems; voltage unbalance between DC-link capacitors and larger blocking voltage across the inner switching devices. To solve these problems, the novel multi-level inverter structure is proposed.

• The Transactions of the Korean Institute of Power Electronics
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• v.26 no.2
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• pp.96-105
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• 2021

Large-scale power converters consist of series or parallel module combinations. In these modular converter systems, the interleaving technique can be applied to improve capacitor reliability by reducing the ripple of the I/O current in which each module operates as a phase difference. However, when applying the interleaving technique for conventional three-level boost converters, the short-circuit period of the converter can be an obstacle. Such problem is caused by the absence of a low-level inductor of the conventional three-level boost converter. To solve this problem, a three-level boost converter with a low-level inductor is proposed and analyzed to enable interleaved operation. In the proposed circuit, the current ripple of the output capacitor depends on the neutral point connections between the modules. In this study, the ripple current is analyzed by the neutral point connections of the three-level boost converter that has a low-level inductor, and the effectiveness of the proposed circuit is proven by simulation and experiment.

• Journal of the Korean Society of Safety
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• v.36 no.5
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• pp.79-85
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• 2021

A standard engineering model that reflects the current organization system and engineering operation process of domestic nuclear power plants was developed based on the Standard Nuclear Performance Model developed by the American Nuclear Energy Association. The level 0 screen, which is the main screen of the engineering model computer system, consisted of an object tree structure, which provided information that is phased down from a higher structure level to a lower structure level (i.e., level 3). The level 1 screen provided information related to the sub-process of the engineering operation, whereas the Level 2 screen provided information related to each engineering operation activity. In addition, the Level 2 screen provided additional functions, such as linking electronic procedures/guidelines, providing electronic performance forms, and connecting legacy computer systems (such as total equipment reliability monitoring system, configuration management systems, technical information systems, risk monitoring systems, regulatory information, and electronic drawing system). This screen level increased the convenience of user's engineering tasks by implementing them. The computerization of an engineering model that connects the entire engineering tasks of an establishment enables the easy understanding of information related to the engineering process before and after the operation, and builds a foundation for the enhancement of the work efficiency and employee capacity. In addition, KHNP developed an online training module, which operates as an e-learning process, on the overview and utilization of a standard engineering model to expand the understanding of standard engineering models by plant employees and to secure competitiveness.

• The Transactions of the Korean Institute of Power Electronics
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• v.11 no.6
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• pp.543-550
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• 2006

A three-level sustain circuit with six-switches for an ac plasma display panel (AC-PDP) drive is proposed. The proposed circuit features half the voltage stresses of sustain switches and clamp diodes and significantly reduced power losses compared with those of the conventional ones. This circuit, realizable with reduced cost of the semiconductor devices, gives a significant improvement in the power efficiency, essential for the design of a drive circuit for the AC-PDP. A comparative analysis and experimental results we presented to show the validity of the proposed sustainer circuit.

• The Transactions of the Korean Institute of Power Electronics
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• v.19 no.4
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• pp.320-326
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• 2014

In this paper, the new smart dimming algorithm which is mixed with PWM and PAM control method is proposed for reducing the power consumption of LED TV Backlight. The proposed technique is using the curve characteristics of LED forward voltage and current which is proportionally changing LED forward voltage as changing LED forward current. Therefore, each PWM and PAM control method has different LED forward voltage and current in the same brightness condition. The PWM control method adjusts the brightness of LED TV Backlight by only varying the duty ratio of PWM and constantly sustaining the amplitude of LED forward current and voltage. So, the level of LED forward current and voltage in the PWM control method is relatively high and constant regardless of duty ratio of PWM. On the other hand, the PAM control method adjusts the brightness of LED TV Backlight by directly varying the level of LED forward current. So, the level of LED forward current and voltage in the PAM control method is lowered according to the brightness level. For the above-mentioned reason, the PAM control method has the advantage of reducing the total power consumption of LED TV Backlight at the brightness condition of below 100%, compared with PWM control method. By implementing this characteristic to LED driver circuit with control algorithm in MCU, the power consumption of LED TV Backlight can expect to be reduced. The effectiveness of the proposed method, new smart dimming algorithm, CPWAM(=Conditional Pulse Width Amplitude Modulation), has been verified by experimental results.